OpenBIC
OpenSource Bridge-IC
Classes | Macros | Typedefs | Enumerations | Functions | Variables
plat_hook.h File Reference
#include "sensor.h"
#include "plat_pldm_sensor.h"
Include dependency graph for plat_hook.h:
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Classes

struct  vr_vout_range_user_settings_struct
 
struct  vr_mapping_status
 
struct  _vr_pre_proc_arg
 
struct  vr_mapping_sensor
 
struct  bootstrap_mapping_register
 
struct  bootstrap_user_settings_struct
 

Macros

#define VR_MAX_NUM   14
 
#define VR_MUTEX_LOCK_TIMEOUT_MS   1000
 

Typedefs

typedef struct vr_vout_range_user_settings_struct vr_vout_range_user_settings_struct
 
typedef struct vr_mapping_status vr_mapping_status
 
typedef struct _vr_pre_proc_arg vr_pre_proc_arg
 
typedef struct vr_mapping_sensor vr_mapping_sensor
 
typedef struct bootstrap_mapping_register bootstrap_mapping_register
 
typedef struct bootstrap_user_settings_struct bootstrap_user_settings_struct
 

Enumerations

enum  VR_INDEX_E {
  VR_INDEX_E_P3V3 = 0 , VR_INDEX_E_P0V85 , VR_INDEX_E_P0V75_CH_N , VR_INDEX_E_P0V75_CH_S ,
  VR_INDEX_E_P0V75_TRVDD_ZONEA , VR_INDEX_E_P0V75_TRVDD_ZONEB , VR_INDEX_E_P1V1_VDDC_HBM0_HBM2_HBM4 , VR_INDEX_E_P0V9_TRVDD_ZONEA ,
  VR_INDEX_E_P0V9_TRVDD_ZONEB , VR_INDEX_E_P1V1_VDDC_HBM1_HBM3_HBM5 , VR_INDEX_E_P0V8_VDDA_PCIE , VR_INDEX_MAX ,
  VR_INDEX_E_1 = 0 , VR_INDEX_E_2 , VR_INDEX_E_3 , VR_INDEX_E_4 ,
  VR_INDEX_E_5 , VR_INDEX_E_6 , VR_INDEX_E_7 , VR_INDEX_E_8 ,
  VR_INDEX_E_9 , VR_INDEX_E_10 , VR_INDEX_E_11 , VR_INDEX_E_12 ,
  VR_INDEX_E_13 , VR_INDEX_E_14 , VR_INDEX_MAX , VR_INDEX_E_1 = 0 ,
  VR_INDEX_E_2 , VR_INDEX_E_3 , VR_INDEX_E_4 , VR_INDEX_E_5 ,
  VR_INDEX_E_6 , VR_INDEX_E_7 , VR_INDEX_E_8 , VR_INDEX_E_9 ,
  VR_INDEX_E_10 , VR_INDEX_E_11 , VR_INDEX_E_12 , VR_INDEX_E_13 ,
  VR_INDEX_MAX , VR_INDEX_E_P0V895 , VR_INDEX_E_P0V825 , VR_INDEX_MAX
}
 
enum  VR_RAIL_E {
  VR_RAIL_E_P3V3 = 0 , VR_RAIL_E_P0V85_PVDD , VR_RAIL_E_P0V75_PVDD_CH_N , VR_RAIL_E_P0V75_MAX_PHY_N ,
  VR_RAIL_E_P0V75_PVDD_CH_S , VR_RAIL_E_P0V75_MAX_PHY_S , VR_RAIL_E_P0V75_TRVDD_ZONEA , VR_RAIL_E_P1V8_VPP_HBM0_HBM2_HBM4 ,
  VR_RAIL_E_P0V75_TRVDD_ZONEB , VR_RAIL_E_P0V4_VDDQL_HBM0_HBM2_HBM4 , VR_RAIL_E_P1V1_VDDC_HBM0_HBM2_HBM4 , VR_RAIL_E_P0V75_VDDPHY_HBM0_HBM2_HBM4 ,
  VR_RAIL_E_P0V9_TRVDD_ZONEA , VR_RAIL_E_P1V8_VPP_HBM1_HBM3_HBM5 , VR_RAIL_E_P0V9_TRVDD_ZONEB , VR_RAIL_E_P0V4_VDDQL_HBM1_HBM3_HBM5 ,
  VR_RAIL_E_P1V1_VDDC_HBM1_HBM3_HBM5 , VR_RAIL_E_P0V75_VDDPHY_HBM1_HBM3_HBM5 , VR_RAIL_E_P0V8_VDDA_PCIE , VR_RAIL_E_P1V2_VDDHTX_PCIE ,
  VR_RAIL_E_MAX , VR_RAIL_E_ASIC_P0V75_NUWA0_VDD = 0 , VR_RAIL_E_ASIC_P0V75_NUWA1_VDD , VR_RAIL_E_ASIC_P0V9_OWL_E_TRVDD ,
  VR_RAIL_E_ASIC_P0V75_OWL_E_TRVDD , VR_RAIL_E_ASIC_P0V75_MAX_M_VDD , VR_RAIL_E_ASIC_P0V75_VDDPHY_HBM1357 , VR_RAIL_E_ASIC_P0V75_OWL_E_VDD ,
  VR_RAIL_E_ASIC_P0V4_VDDQL_HBM1357 , VR_RAIL_E_ASIC_P1V05_VDDC_HBM1357 , VR_RAIL_E_ASIC_P1V8_VPP_HBM1357 , VR_RAIL_E_ASIC_P0V9_VDDQ_HBM1357 ,
  VR_RAIL_E_ASIC_P0V85_HAMSA_VDD , VR_RAIL_E_ASIC_P0V75_MAX_N_VDD , VR_RAIL_E_ASIC_P0V8_HAMSA_AVDD_PCIE , VR_RAIL_E_ASIC_P0V9_VDDQ_HBM0246 ,
  VR_RAIL_E_ASIC_P1V2_HAMSA_VDDHRXTX_PCIE , VR_RAIL_E_ASIC_P1V05_VDDC_HBM0246 , VR_RAIL_E_ASIC_P1V8_VPP_HBM0246 , VR_RAIL_E_ASIC_P0V4_VDDQL_HBM0246 ,
  VR_RAIL_E_ASIC_P0V75_VDDPHY_HBM0246 , VR_RAIL_E_ASIC_P0V75_OWL_W_VDD , VR_RAIL_E_ASIC_P0V75_MAX_S_VDD , VR_RAIL_E_ASIC_P0V9_OWL_W_TRVDD ,
  VR_RAIL_E_ASIC_P0V75_OWL_W_TRVDD , VR_RAIL_E_P3V3_OSFP_VOLT_V , VR_RAIL_E_MAX , VR_RAIL_E_ASIC_P0V85_MEDHA0_VDD = 0 ,
  VR_RAIL_E_ASIC_P0V85_MEDHA1_VDD , VR_RAIL_E_ASIC_P0V9_OWL_E_TRVDD , VR_RAIL_E_ASIC_P0V75_OWL_E_TRVDD , VR_RAIL_E_ASIC_P0V75_MAX_M_VDD ,
  VR_RAIL_E_ASIC_P0V75_VDDPHY_HBM1357 , VR_RAIL_E_ASIC_P0V75_OWL_E_VDD , VR_RAIL_E_ASIC_P0V4_VDDQL_HBM1357 , VR_RAIL_E_ASIC_P1V1_VDDQC_HBM1357 ,
  VR_RAIL_E_ASIC_P1V8_VPP_HBM1357 , VR_RAIL_E_ASIC_P0V75_MAX_N_VDD , VR_RAIL_E_ASIC_P0V8_HAMSA_AVDD_PCIE , VR_RAIL_E_ASIC_P1V2_HAMSA_VDDHRXTX_PCIE ,
  VR_RAIL_E_ASIC_P0V85_HAMSA_VDD , VR_RAIL_E_ASIC_P1V1_VDDQC_HBM0246 , VR_RAIL_E_ASIC_P1V8_VPP_HBM0246 , VR_RAIL_E_ASIC_P0V4_VDDQL_HBM0246 ,
  VR_RAIL_E_ASIC_P0V75_VDDPHY_HBM0246 , VR_RAIL_E_ASIC_P0V75_OWL_W_VDD , VR_RAIL_E_ASIC_P0V75_MAX_S_VDD , VR_RAIL_E_ASIC_P0V9_OWL_W_TRVDD ,
  VR_RAIL_E_ASIC_P0V75_OWL_W_TRVDD , VR_RAIL_E_P3V3_OSFP_VOLT_V , VR_RAIL_E_MAX , VR_RAIL_E_P0V895_PEX = 0 ,
  VR_RAIL_E_P0V825_A0 , VR_RAIL_E_P0V825_A1 , VR_RAIL_E_P0V825_A2 , VR_RAIL_E_MAX
}
 
enum  UBC_VR_RAIL_E {
  UBC_VR_RAIL_E_UBC1 , UBC_VR_RAIL_E_UBC2 , UBC_VR_RAIL_E_P3V3 , UBC_VR_RAIL_E_P0V85_PVDD ,
  UBC_VR_RAIL_E_P0V75_PVDD_CH_N , UBC_VR_RAIL_E_P0V75_MAX_PHY_N , UBC_VR_RAIL_E_P0V75_PVDD_CH_S , UBC_VR_RAIL_E_P0V75_MAX_PHY_S ,
  UBC_VR_RAIL_E_P0V75_TRVDD_ZONEA , UBC_VR_RAIL_E_P1V8_VPP_HBM0_HBM2_HBM4 , UBC_VR_RAIL_E_P0V75_TRVDD_ZONEB , UBC_VR_RAIL_E_P0V4_VDDQL_HBM0_HBM2_HBM4 ,
  UBC_VR_RAIL_E_P1V1_VDDC_HBM0_HBM2_HBM4 , UBC_VR_RAIL_E_P0V75_VDDPHY_HBM0_HBM2_HBM4 , UBC_VR_RAIL_E_P0V9_TRVDD_ZONEA , UBC_VR_RAIL_E_P1V8_VPP_HBM1_HBM3_HBM5 ,
  UBC_VR_RAIL_E_P0V9_TRVDD_ZONEB , UBC_VR_RAIL_E_P0V4_VDDQL_HBM1_HBM3_HBM5 , UBC_VR_RAIL_E_P1V1_VDDC_HBM1_HBM3_HBM5 , UBC_VR_RAIL_E_P0V75_VDDPHY_HBM1_HBM3_HBM5 ,
  UBC_VR_RAIL_E_P0V8_VDDA_PCIE , UBC_VR_RAIL_E_P1V2_VDDHTX_PCIE , UBC_VR_RAIL_E_MAX , UBC_VR_RAIL_E_UBC1 ,
  UBC_VR_RAIL_E_UBC2 , UBC_VR_RAIL_E_ASIC_P0V75_NUWA0_VDD , UBC_VR_RAIL_E_ASIC_P0V75_NUWA1_VDD , UBC_VR_RAIL_E_ASIC_P0V9_OWL_E_TRVDD ,
  UBC_VR_RAIL_E_ASIC_P0V75_OWL_E_TRVDD , UBC_VR_RAIL_E_ASIC_P0V75_MAX_M_VDD , UBC_VR_RAIL_E_ASIC_P0V75_VDDPHY_HBM1357 , UBC_VR_RAIL_E_ASIC_P0V75_OWL_E_VDD ,
  UBC_VR_RAIL_E_ASIC_P0V4_VDDQL_HBM1357 , UBC_VR_RAIL_E_ASIC_P1V05_VDDC_HBM1357 , UBC_VR_RAIL_E_ASIC_P1V8_VPP_HBM1357 , UBC_VR_RAIL_E_ASIC_P0V9_VDDQ_HBM1357 ,
  UBC_VR_RAIL_E_ASIC_P0V85_HAMSA_VDD , UBC_VR_RAIL_E_ASIC_P0V75_MAX_N_VDD , UBC_VR_RAIL_E_ASIC_P0V8_HAMSA_AVDD_PCIE , UBC_VR_RAIL_E_ASIC_P0V9_VDDQ_HBM0246 ,
  UBC_VR_RAIL_E_ASIC_P1V2_HAMSA_VDDHRXTX_PCIE , UBC_VR_RAIL_E_ASIC_P1V05_VDDC_HBM0246 , UBC_VR_RAIL_E_ASIC_P1V8_VPP_HBM0246 , UBC_VR_RAIL_E_ASIC_P0V4_VDDQL_HBM0246 ,
  UBC_VR_RAIL_E_ASIC_P0V75_VDDPHY_HBM0246 , UBC_VR_RAIL_E_ASIC_P0V75_OWL_W_VDD , UBC_VR_RAIL_E_ASIC_P0V75_MAX_S_VDD , UBC_VR_RAIL_E_ASIC_P0V9_OWL_W_TRVDD ,
  UBC_VR_RAIL_E_ASIC_P0V75_OWL_W_TRVDD , UBC_VR_RAIL_E_P3V3_OSFP , UBC_VR_RAIL_E_MAX , UBC_VR_RAIL_E_UBC1 ,
  UBC_VR_RAIL_E_UBC2 , UBC_VR_RAIL_E_ASIC_P0V85_MEDHA0_VDD , UBC_VR_RAIL_E_ASIC_P0V85_MEDHA1_VDD , UBC_VR_RAIL_E_ASIC_P0V9_OWL_E_TRVDD ,
  UBC_VR_RAIL_E_ASIC_P0V75_OWL_E_TRVDD , UBC_VR_RAIL_E_ASIC_P0V75_MAX_M_VDD , UBC_VR_RAIL_E_ASIC_P0V75_VDDPHY_HBM1357 , UBC_VR_RAIL_E_ASIC_P0V75_OWL_E_VDD ,
  UBC_VR_RAIL_E_ASIC_P0V4_VDDQL_HBM1357 , UBC_VR_RAIL_E_ASIC_P1V1_VDDQC_HBM1357 , UBC_VR_RAIL_E_ASIC_P1V8_VPP_HBM1357 , UBC_VR_RAIL_E_ASIC_P0V75_MAX_N_VDD ,
  UBC_VR_RAIL_E_ASIC_P0V8_HAMSA_AVDD_PCIE , UBC_VR_RAIL_E_ASIC_P1V2_HAMSA_VDDHRXTX_PCIE , UBC_VR_RAIL_E_ASIC_P0V85_HAMSA_VDD , UBC_VR_RAIL_E_ASIC_P1V1_VDDQC_HBM0246 ,
  UBC_VR_RAIL_E_ASIC_P1V8_VPP_HBM0246 , UBC_VR_RAIL_E_ASIC_P0V4_VDDQL_HBM0246 , UBC_VR_RAIL_E_ASIC_P0V75_VDDPHY_HBM0246 , UBC_VR_RAIL_E_ASIC_P0V75_OWL_W_VDD ,
  UBC_VR_RAIL_E_ASIC_P0V75_MAX_S_VDD , UBC_VR_RAIL_E_ASIC_P0V9_OWL_W_TRVDD , UBC_VR_RAIL_E_ASIC_P0V75_OWL_W_TRVDD , UBC_VR_RAIL_E_P3V3_OSFP ,
  UBC_VR_RAIL_E_MAX
}
 
enum  VR_STAUS_E {
  VR_STAUS_E_STATUS_BYTE = 0 , VR_STAUS_E_STATUS_WORD , VR_STAUS_E_STATUS_VOUT , VR_STAUS_E_STATUS_IOUT ,
  VR_STAUS_E_STATUS_INPUT , VR_STAUS_E_STATUS_TEMPERATURE , VR_STAUS_E_STATUS_CML , VR_STAUS_E_MAX ,
  VR_STAUS_E_STATUS_BYTE = 0 , VR_STAUS_E_STATUS_WORD , VR_STAUS_E_STATUS_VOUT , VR_STAUS_E_STATUS_IOUT ,
  VR_STAUS_E_STATUS_INPUT , VR_STAUS_E_STATUS_TEMPERATURE , VR_STAUS_E_STATUS_CML , VR_STAUS_E_MAX ,
  VR_STAUS_E_STATUS_BYTE = 0 , VR_STAUS_E_STATUS_WORD , VR_STAUS_E_STATUS_VOUT , VR_STAUS_E_STATUS_IOUT ,
  VR_STAUS_E_STATUS_INPUT , VR_STAUS_E_STATUS_TEMPERATURE , VR_STAUS_E_STATUS_CML , VR_STAUS_E_MAX ,
  VR_STAUS_E_STATUS_BYTE = 0 , VR_STAUS_E_STATUS_WORD , VR_STAUS_E_STATUS_VOUT , VR_STAUS_E_STATUS_IOUT ,
  VR_STAUS_E_STATUS_INPUT , VR_STAUS_E_STATUS_TEMPERATURE , VR_STAUS_E_STATUS_CML , VR_STAUS_E_MAX
}
 
enum  STRAP_TYPE_E {
  STRAP_TYPE_CPLD = 0 , STRAP_TYPE_IOEXP_PCA6416A , STRAP_TYPE_IOEXP_TCA6424A , STRAP_TYPE_IOEXP_TCAL6408R ,
  STRAP_TYPE_MAX , STRAP_TYPE_CPLD = 0 , STRAP_TYPE_IOEXP_PCA6416A , STRAP_TYPE_IOEXP_TCA6424A ,
  STRAP_TYPE_MAX
}
 
enum  PLAT_STRAP_INDEX_E {
  STRAP_INDEX_SOC_JTAG_MUX_SEL_0_3 , STRAP_INDEX_SOC_DFT_TAP_EN_L , STRAP_INDEX_SOC_ATPG_MODE_L , STRAP_INDEX_SOC_PAD_TRI_N ,
  STRAP_INDEX_SOC_CORE_TAP_CTRL_L , STRAP_INDEX_SOC_BOOT_SOURCE_0_4 , STRAP_INDEX_SOC_BOOT_SOURCE_5_6 , STRAP_INDEX_SOC_BOOT_SOURCE_7 ,
  STRAP_INDEX_SOC_GPIO2 , STRAP_INDEX_S_OWL_BOOT_SOURCE_0_7 , STRAP_INDEX_N_OWL_BOOT_SOURCE_0_7 , STRAP_INDEX_S_OWL_PAD_TRI_N ,
  STRAP_INDEX_S_OWL_ATPG_MODE_L , STRAP_INDEX_S_OWL_DFT_TAP_EN_L , STRAP_INDEX_S_OWL_CORE_TAP_CTRL_L , STRAP_INDEX_N_OWL_PAD_TRI_N ,
  STRAP_INDEX_N_OWL_ATPG_MODE_L , STRAP_INDEX_N_OWL_DFT_TAP_EN_L , STRAP_INDEX_N_OWL_CORE_TAP_CTRL_L , STRAP_INDEX_S_OWL_JTAG_MUX_SEL_0_3 ,
  STRAP_INDEX_N_OWL_JTAG_MUX_SEL_0_3 , STRAP_INDEX_S_OWL_UART_MUX_SEL_0_2 , STRAP_INDEX_N_OWL_UART_MUX_SEL_0_2 , STRAP_INDEX_MAX ,
  STRAP_INDEX_HAMSA_TEST_STRAP_R = 0 , STRAP_INDEX_HAMSA_LS_STRAP_0 , STRAP_INDEX_HAMSA_LS_STRAP_1 , STRAP_INDEX_HAMSA_CRM_STRAP_0 ,
  STRAP_INDEX_HAMSA_CRM_STRAP_1 , STRAP_INDEX_HAMSA_MFIO7 , STRAP_INDEX_HAMSA_MFIO9 , STRAP_INDEX_HAMSA_MFIO11 ,
  STRAP_INDEX_HAMSA_MFIO17 , STRAP_INDEX_HAMSA_MFIO18 , STRAP_INDEX_HAMSA_CORE_TAP_CTRL_L , STRAP_INDEX_HAMSA_TRI_L ,
  STRAP_INDEX_HAMSA_ATPG_MODE_L , STRAP_INDEX_HAMSA_DFT_TAP_EN_L , STRAP_INDEX_FM_JTAG_HAMSA_JTCE_0_3 , STRAP_INDEX_NUWA0_TEST_STRAP ,
  STRAP_INDEX_NUWA0_CRM_STRAP_0 , STRAP_INDEX_NUWA0_CRM_STRAP_1 , STRAP_INDEX_NUWA0_CHIP_STRAP_0 , STRAP_INDEX_NUWA0_CHIP_STRAP_1 ,
  STRAP_INDEX_NUWA0_CORE_TAP_CTRL_PLD_L , STRAP_INDEX_NUWA0_TRI_L , STRAP_INDEX_NUWA0_ATPG_MODE_L , STRAP_INDEX_NUWA0_DFT_TAP_EN_PLD_L ,
  STRAP_INDEX_NUWA1_TEST_STRAP , STRAP_INDEX_NUWA1_CRM_STRAP_0 , STRAP_INDEX_NUWA1_CRM_STRAP_1 , STRAP_INDEX_NUWA1_CHIP_STRAP_0 ,
  STRAP_INDEX_NUWA1_CHIP_STRAP_1 , STRAP_INDEX_NUWA1_CORE_TAP_CTRL_PLD_L , STRAP_INDEX_NUWA1_TRI_L , STRAP_INDEX_NUWA1_ATPG_MODE_L ,
  STRAP_INDEX_NUWA1_DFT_TAP_EN_PLD_L , STRAP_INDEX_FM_JTAG_NUWA0_JTCE_0_2 , STRAP_INDEX_FM_JTAG_NUWA1_JTCE_0_2 , STRAP_INDEX_PLD_OWL_E_DFT_TAP_EN_L ,
  STRAP_INDEX_PLD_OWL_E_CORE_TAP_CTRL_L , STRAP_INDEX_PLD_OWL_E_PAD_TRI_L , STRAP_INDEX_PLD_OWL_E_ATPG_MODE_L , STRAP_INDEX_PLD_OWL_W_DFT_TAP_EN_L ,
  STRAP_INDEX_PLD_OWL_W_CORE_TAP_CTRL_L , STRAP_INDEX_PLD_OWL_W_PAD_TRI_L , STRAP_INDEX_PLD_OWL_W_ATPG_MODE_L , STRAP_INDEX_OWL_E_JTAG_MUX_PLD_SEL_0_3 ,
  STRAP_INDEX_OWL_W_JTAG_MUX_PLD_SEL_0_3 , STRAP_INDEX_OWL_E_UART_MUX_PLD_SEL_0_2 , STRAP_INDEX_OWL_W_UART_MUX_PLD_SEL_0_2 , STRAP_INDEX_OWL_E_DVT_ENABLE ,
  STRAP_INDEX_OWL_W_DVT_ENABLE , STRAP_INDEX_OWL_E_BOOT_SOURCE_0_7 , STRAP_INDEX_OWL_W_BOOT_SOURCE_0_7 , STRAP_INDEX_EXCEPT_EVB_MAX ,
  STRAP_INDEX_HAMSA_MFIO6 = STRAP_INDEX_EXCEPT_EVB_MAX , STRAP_INDEX_HAMSA_MFIO8 , STRAP_INDEX_HAMSA_MFIO10 , STRAP_INDEX_NUWA0_MFIO6 ,
  STRAP_INDEX_NUWA0_MFIO8 , STRAP_INDEX_NUWA0_MFIO10 , STRAP_INDEX_NUWA1_MFIO6 , STRAP_INDEX_NUWA1_MFIO8 ,
  STRAP_INDEX_NUWA1_MFIO10 , STRAP_INDEX_MAX , STRAP_INDEX_HAMSA_TEST_STRAP_R = 0 , STRAP_INDEX_HAMSA_LS_STRAP_0 ,
  STRAP_INDEX_HAMSA_LS_STRAP_1 , STRAP_INDEX_HAMSA_CRM_STRAP_0 , STRAP_INDEX_HAMSA_CRM_STRAP_1 , STRAP_INDEX_HAMSA_MFIO7 ,
  STRAP_INDEX_HAMSA_MFIO9 , STRAP_INDEX_HAMSA_MFIO11 , STRAP_INDEX_HAMSA_MFIO17 , STRAP_INDEX_HAMSA_MFIO18 ,
  STRAP_INDEX_HAMSA_CORE_TAP_CTRL_L , STRAP_INDEX_HAMSA_TRI_L , STRAP_INDEX_HAMSA_ATPG_MODE_L , STRAP_INDEX_HAMSA_DFT_TAP_EN_L ,
  STRAP_INDEX_FM_JTAG_HAMSA_JTCE_0_3 , STRAP_INDEX_MEDHA0_TEST_STRAP , STRAP_INDEX_MEDHA0_CRM_STRAP_0 , STRAP_INDEX_MEDHA0_CRM_STRAP_1 ,
  STRAP_INDEX_MEDHA0_CHIP_STRAP_0 , STRAP_INDEX_MEDHA0_CHIP_STRAP_1 , STRAP_INDEX_MEDHA0_CORE_TAP_CTRL_PLD_L , STRAP_INDEX_MEDHA0_TRI_L ,
  STRAP_INDEX_MEDHA0_ATPG_MODE_L , STRAP_INDEX_MEDHA0_DFT_TAP_EN_PLD_L , STRAP_INDEX_MEDHA1_TEST_STRAP , STRAP_INDEX_MEDHA1_CRM_STRAP_0 ,
  STRAP_INDEX_MEDHA1_CRM_STRAP_1 , STRAP_INDEX_MEDHA1_CHIP_STRAP_0 , STRAP_INDEX_MEDHA1_CHIP_STRAP_1 , STRAP_INDEX_MEDHA1_CORE_TAP_CTRL_PLD_L ,
  STRAP_INDEX_MEDHA1_TRI_L , STRAP_INDEX_MEDHA1_ATPG_MODE_L , STRAP_INDEX_MEDHA1_DFT_TAP_EN_PLD_L , STRAP_INDEX_FM_JTAG_MEDHA0_JTCE_0_2 ,
  STRAP_INDEX_FM_JTAG_MEDHA1_JTCE_0_2 , STRAP_INDEX_PLD_OWL_E_DFT_TAP_EN_L , STRAP_INDEX_PLD_OWL_E_CORE_TAP_CTRL_L , STRAP_INDEX_PLD_OWL_E_PAD_TRI_L ,
  STRAP_INDEX_PLD_OWL_E_ATPG_MODE_L , STRAP_INDEX_PLD_OWL_W_DFT_TAP_EN_L , STRAP_INDEX_PLD_OWL_W_CORE_TAP_CTRL_L , STRAP_INDEX_PLD_OWL_W_PAD_TRI_L ,
  STRAP_INDEX_PLD_OWL_W_ATPG_MODE_L , STRAP_INDEX_OWL_E_JTAG_MUX_PLD_SEL_0_3 , STRAP_INDEX_OWL_W_JTAG_MUX_PLD_SEL_0_3 , STRAP_INDEX_OWL_E_UART_MUX_PLD_SEL_0_2 ,
  STRAP_INDEX_OWL_W_UART_MUX_PLD_SEL_0_2 , STRAP_INDEX_OWL_E_DVT_ENABLE , STRAP_INDEX_OWL_W_DVT_ENABLE , STRAP_INDEX_OWL_E_BOOT_SOURCE_0_7 ,
  STRAP_INDEX_OWL_W_BOOT_SOURCE_0_7 , STRAP_INDEX_EXCEPT_EVB_MAX , STRAP_INDEX_HAMSA_MFIO6 = STRAP_INDEX_EXCEPT_EVB_MAX , STRAP_INDEX_HAMSA_MFIO8 ,
  STRAP_INDEX_HAMSA_MFIO10 , STRAP_INDEX_MEDHA0_MFIO6 , STRAP_INDEX_MEDHA0_MFIO8 , STRAP_INDEX_MEDHA0_MFIO10 ,
  STRAP_INDEX_MEDHA1_MFIO6 , STRAP_INDEX_MEDHA1_MFIO8 , STRAP_INDEX_MEDHA1_MFIO10 , STRAP_INDEX_MAX
}
 

Functions

bool pre_vr_read (sensor_cfg *cfg, void *args)
 
bool post_vr_read (sensor_cfg *cfg, void *args, int *const reading)
 
bool post_tmp_read (sensor_cfg *cfg, void *args, int *reading)
 
bool get_average_power (uint8_t rail, uint32_t *milliwatt)
 
bool is_mb_dc_on ()
 
void * vr_mutex_get (enum VR_INDEX_E vr_index)
 
void vr_mutex_init (void)
 
bool vr_rail_name_get (uint8_t rail, uint8_t **name)
 
bool vr_status_name_get (uint8_t rail, uint8_t **name)
 
bool vr_rail_enum_get (uint8_t *name, uint8_t *num)
 
bool vr_status_enum_get (uint8_t *name, uint8_t *num)
 
bool plat_get_vr_status (uint8_t rail, uint8_t vr_status_rail, uint16_t *vr_status)
 
bool plat_clear_vr_status (uint8_t rail)
 
bool plat_get_vout_command (uint8_t rail, uint16_t *millivolt)
 
bool post_common_sensor_read (sensor_cfg *cfg, void *args, int *const reading)
 
bool vr_vout_range_user_settings_init (void)
 
bool vr_rail_voltage_peak_get (uint8_t *name, int *peak_value)
 
bool vr_rail_voltage_peak_clear (uint8_t rail_index)
 
bool ubc_vr_rail_name_get (uint8_t rail, uint8_t **name)
 
bool ubc_vr_rail_enum_get (uint8_t *name, uint8_t *num)
 
bool post_ubc_read (sensor_cfg *cfg, void *args, int *reading)
 
bool plat_get_alert_level_is_assert (void)
 
bool bootstrap_default_settings_init (void)
 
bool bootstrap_user_settings_init (void)
 
bool temp_threshold_user_settings_get (void *temp_threshold_user_settings)
 
bool set_bootstrap_table_and_user_settings (uint8_t rail, uint8_t *change_setting_value, uint8_t drive_index_level, bool is_perm, bool is_default)
 
bool strap_name_get (uint8_t rail, uint8_t **name)
 
bool strap_enum_get (uint8_t *name, uint8_t *num)
 
bool get_bootstrap_change_drive_level (int rail, int *drive_level)
 
bool find_bootstrap_by_rail (uint8_t rail, bootstrap_mapping_register *result)
 
bool bootstrap_user_settings_set (void *bootstrap_user_settings)
 
bool set_bootstrap_table_val_to_ioexp (void)
 
bool set_ioexp_val_to_bootstrap_table (void)
 
bool set_bootstrap_val_to_device (uint8_t strap, uint8_t val)
 
uint8_t get_strap_index_max ()
 
uint8_t get_emc1413_cache_status (uint8_t idx)
 

Variables

bootstrap_user_settings_struct bootstrap_user_settings
 
vr_vout_range_user_settings_struct vout_range_user_settings
 
mp2971_init_arg mp2971_init_args []
 

Macro Definition Documentation

◆ VR_MAX_NUM

#define VR_MAX_NUM   14

◆ VR_MUTEX_LOCK_TIMEOUT_MS

#define VR_MUTEX_LOCK_TIMEOUT_MS   1000

Typedef Documentation

◆ bootstrap_mapping_register

typedef struct bootstrap_mapping_register bootstrap_mapping_register

◆ bootstrap_user_settings_struct

typedef struct bootstrap_user_settings_struct bootstrap_user_settings_struct

◆ vr_mapping_sensor

typedef struct vr_mapping_sensor vr_mapping_sensor

◆ vr_mapping_status

typedef struct vr_mapping_status vr_mapping_status

◆ vr_pre_proc_arg

typedef struct _vr_pre_proc_arg vr_pre_proc_arg

◆ vr_vout_range_user_settings_struct

typedef struct vr_vout_range_user_settings_struct vr_vout_range_user_settings_struct

Enumeration Type Documentation

◆ PLAT_STRAP_INDEX_E

enum PLAT_STRAP_INDEX_E
Enumerator
STRAP_INDEX_SOC_JTAG_MUX_SEL_0_3 
STRAP_INDEX_SOC_DFT_TAP_EN_L 
STRAP_INDEX_SOC_ATPG_MODE_L 
STRAP_INDEX_SOC_PAD_TRI_N 
STRAP_INDEX_SOC_CORE_TAP_CTRL_L 
STRAP_INDEX_SOC_BOOT_SOURCE_0_4 
STRAP_INDEX_SOC_BOOT_SOURCE_5_6 
STRAP_INDEX_SOC_BOOT_SOURCE_7 
STRAP_INDEX_SOC_GPIO2 
STRAP_INDEX_S_OWL_BOOT_SOURCE_0_7 
STRAP_INDEX_N_OWL_BOOT_SOURCE_0_7 
STRAP_INDEX_S_OWL_PAD_TRI_N 
STRAP_INDEX_S_OWL_ATPG_MODE_L 
STRAP_INDEX_S_OWL_DFT_TAP_EN_L 
STRAP_INDEX_S_OWL_CORE_TAP_CTRL_L 
STRAP_INDEX_N_OWL_PAD_TRI_N 
STRAP_INDEX_N_OWL_ATPG_MODE_L 
STRAP_INDEX_N_OWL_DFT_TAP_EN_L 
STRAP_INDEX_N_OWL_CORE_TAP_CTRL_L 
STRAP_INDEX_S_OWL_JTAG_MUX_SEL_0_3 
STRAP_INDEX_N_OWL_JTAG_MUX_SEL_0_3 
STRAP_INDEX_S_OWL_UART_MUX_SEL_0_2 
STRAP_INDEX_N_OWL_UART_MUX_SEL_0_2 
STRAP_INDEX_MAX 
STRAP_INDEX_HAMSA_TEST_STRAP_R 
STRAP_INDEX_HAMSA_LS_STRAP_0 
STRAP_INDEX_HAMSA_LS_STRAP_1 
STRAP_INDEX_HAMSA_CRM_STRAP_0 
STRAP_INDEX_HAMSA_CRM_STRAP_1 
STRAP_INDEX_HAMSA_MFIO7 
STRAP_INDEX_HAMSA_MFIO9 
STRAP_INDEX_HAMSA_MFIO11 
STRAP_INDEX_HAMSA_MFIO17 
STRAP_INDEX_HAMSA_MFIO18 
STRAP_INDEX_HAMSA_CORE_TAP_CTRL_L 
STRAP_INDEX_HAMSA_TRI_L 
STRAP_INDEX_HAMSA_ATPG_MODE_L 
STRAP_INDEX_HAMSA_DFT_TAP_EN_L 
STRAP_INDEX_FM_JTAG_HAMSA_JTCE_0_3 
STRAP_INDEX_NUWA0_TEST_STRAP 
STRAP_INDEX_NUWA0_CRM_STRAP_0 
STRAP_INDEX_NUWA0_CRM_STRAP_1 
STRAP_INDEX_NUWA0_CHIP_STRAP_0 
STRAP_INDEX_NUWA0_CHIP_STRAP_1 
STRAP_INDEX_NUWA0_CORE_TAP_CTRL_PLD_L 
STRAP_INDEX_NUWA0_TRI_L 
STRAP_INDEX_NUWA0_ATPG_MODE_L 
STRAP_INDEX_NUWA0_DFT_TAP_EN_PLD_L 
STRAP_INDEX_NUWA1_TEST_STRAP 
STRAP_INDEX_NUWA1_CRM_STRAP_0 
STRAP_INDEX_NUWA1_CRM_STRAP_1 
STRAP_INDEX_NUWA1_CHIP_STRAP_0 
STRAP_INDEX_NUWA1_CHIP_STRAP_1 
STRAP_INDEX_NUWA1_CORE_TAP_CTRL_PLD_L 
STRAP_INDEX_NUWA1_TRI_L 
STRAP_INDEX_NUWA1_ATPG_MODE_L 
STRAP_INDEX_NUWA1_DFT_TAP_EN_PLD_L 
STRAP_INDEX_FM_JTAG_NUWA0_JTCE_0_2 
STRAP_INDEX_FM_JTAG_NUWA1_JTCE_0_2 
STRAP_INDEX_PLD_OWL_E_DFT_TAP_EN_L 
STRAP_INDEX_PLD_OWL_E_CORE_TAP_CTRL_L 
STRAP_INDEX_PLD_OWL_E_PAD_TRI_L 
STRAP_INDEX_PLD_OWL_E_ATPG_MODE_L 
STRAP_INDEX_PLD_OWL_W_DFT_TAP_EN_L 
STRAP_INDEX_PLD_OWL_W_CORE_TAP_CTRL_L 
STRAP_INDEX_PLD_OWL_W_PAD_TRI_L 
STRAP_INDEX_PLD_OWL_W_ATPG_MODE_L 
STRAP_INDEX_OWL_E_JTAG_MUX_PLD_SEL_0_3 
STRAP_INDEX_OWL_W_JTAG_MUX_PLD_SEL_0_3 
STRAP_INDEX_OWL_E_UART_MUX_PLD_SEL_0_2 
STRAP_INDEX_OWL_W_UART_MUX_PLD_SEL_0_2 
STRAP_INDEX_OWL_E_DVT_ENABLE 
STRAP_INDEX_OWL_W_DVT_ENABLE 
STRAP_INDEX_OWL_E_BOOT_SOURCE_0_7 
STRAP_INDEX_OWL_W_BOOT_SOURCE_0_7 
STRAP_INDEX_EXCEPT_EVB_MAX 
STRAP_INDEX_HAMSA_MFIO6 
STRAP_INDEX_HAMSA_MFIO8 
STRAP_INDEX_HAMSA_MFIO10 
STRAP_INDEX_NUWA0_MFIO6 
STRAP_INDEX_NUWA0_MFIO8 
STRAP_INDEX_NUWA0_MFIO10 
STRAP_INDEX_NUWA1_MFIO6 
STRAP_INDEX_NUWA1_MFIO8 
STRAP_INDEX_NUWA1_MFIO10 
STRAP_INDEX_MAX 
STRAP_INDEX_HAMSA_TEST_STRAP_R 
STRAP_INDEX_HAMSA_LS_STRAP_0 
STRAP_INDEX_HAMSA_LS_STRAP_1 
STRAP_INDEX_HAMSA_CRM_STRAP_0 
STRAP_INDEX_HAMSA_CRM_STRAP_1 
STRAP_INDEX_HAMSA_MFIO7 
STRAP_INDEX_HAMSA_MFIO9 
STRAP_INDEX_HAMSA_MFIO11 
STRAP_INDEX_HAMSA_MFIO17 
STRAP_INDEX_HAMSA_MFIO18 
STRAP_INDEX_HAMSA_CORE_TAP_CTRL_L 
STRAP_INDEX_HAMSA_TRI_L 
STRAP_INDEX_HAMSA_ATPG_MODE_L 
STRAP_INDEX_HAMSA_DFT_TAP_EN_L 
STRAP_INDEX_FM_JTAG_HAMSA_JTCE_0_3 
STRAP_INDEX_MEDHA0_TEST_STRAP 
STRAP_INDEX_MEDHA0_CRM_STRAP_0 
STRAP_INDEX_MEDHA0_CRM_STRAP_1 
STRAP_INDEX_MEDHA0_CHIP_STRAP_0 
STRAP_INDEX_MEDHA0_CHIP_STRAP_1 
STRAP_INDEX_MEDHA0_CORE_TAP_CTRL_PLD_L 
STRAP_INDEX_MEDHA0_TRI_L 
STRAP_INDEX_MEDHA0_ATPG_MODE_L 
STRAP_INDEX_MEDHA0_DFT_TAP_EN_PLD_L 
STRAP_INDEX_MEDHA1_TEST_STRAP 
STRAP_INDEX_MEDHA1_CRM_STRAP_0 
STRAP_INDEX_MEDHA1_CRM_STRAP_1 
STRAP_INDEX_MEDHA1_CHIP_STRAP_0 
STRAP_INDEX_MEDHA1_CHIP_STRAP_1 
STRAP_INDEX_MEDHA1_CORE_TAP_CTRL_PLD_L 
STRAP_INDEX_MEDHA1_TRI_L 
STRAP_INDEX_MEDHA1_ATPG_MODE_L 
STRAP_INDEX_MEDHA1_DFT_TAP_EN_PLD_L 
STRAP_INDEX_FM_JTAG_MEDHA0_JTCE_0_2 
STRAP_INDEX_FM_JTAG_MEDHA1_JTCE_0_2 
STRAP_INDEX_PLD_OWL_E_DFT_TAP_EN_L 
STRAP_INDEX_PLD_OWL_E_CORE_TAP_CTRL_L 
STRAP_INDEX_PLD_OWL_E_PAD_TRI_L 
STRAP_INDEX_PLD_OWL_E_ATPG_MODE_L 
STRAP_INDEX_PLD_OWL_W_DFT_TAP_EN_L 
STRAP_INDEX_PLD_OWL_W_CORE_TAP_CTRL_L 
STRAP_INDEX_PLD_OWL_W_PAD_TRI_L 
STRAP_INDEX_PLD_OWL_W_ATPG_MODE_L 
STRAP_INDEX_OWL_E_JTAG_MUX_PLD_SEL_0_3 
STRAP_INDEX_OWL_W_JTAG_MUX_PLD_SEL_0_3 
STRAP_INDEX_OWL_E_UART_MUX_PLD_SEL_0_2 
STRAP_INDEX_OWL_W_UART_MUX_PLD_SEL_0_2 
STRAP_INDEX_OWL_E_DVT_ENABLE 
STRAP_INDEX_OWL_W_DVT_ENABLE 
STRAP_INDEX_OWL_E_BOOT_SOURCE_0_7 
STRAP_INDEX_OWL_W_BOOT_SOURCE_0_7 
STRAP_INDEX_EXCEPT_EVB_MAX 
STRAP_INDEX_HAMSA_MFIO6 
STRAP_INDEX_HAMSA_MFIO8 
STRAP_INDEX_HAMSA_MFIO10 
STRAP_INDEX_MEDHA0_MFIO6 
STRAP_INDEX_MEDHA0_MFIO8 
STRAP_INDEX_MEDHA0_MFIO10 
STRAP_INDEX_MEDHA1_MFIO6 
STRAP_INDEX_MEDHA1_MFIO8 
STRAP_INDEX_MEDHA1_MFIO10 
STRAP_INDEX_MAX 

◆ STRAP_TYPE_E

enum STRAP_TYPE_E
Enumerator
STRAP_TYPE_CPLD 
STRAP_TYPE_IOEXP_PCA6416A 
STRAP_TYPE_IOEXP_TCA6424A 
STRAP_TYPE_IOEXP_TCAL6408R 
STRAP_TYPE_MAX 
STRAP_TYPE_CPLD 
STRAP_TYPE_IOEXP_PCA6416A 
STRAP_TYPE_IOEXP_TCA6424A 
STRAP_TYPE_MAX 

◆ UBC_VR_RAIL_E

enum UBC_VR_RAIL_E
Enumerator
UBC_VR_RAIL_E_UBC1 
UBC_VR_RAIL_E_UBC2 
UBC_VR_RAIL_E_P3V3 
UBC_VR_RAIL_E_P0V85_PVDD 
UBC_VR_RAIL_E_P0V75_PVDD_CH_N 
UBC_VR_RAIL_E_P0V75_MAX_PHY_N 
UBC_VR_RAIL_E_P0V75_PVDD_CH_S 
UBC_VR_RAIL_E_P0V75_MAX_PHY_S 
UBC_VR_RAIL_E_P0V75_TRVDD_ZONEA 
UBC_VR_RAIL_E_P1V8_VPP_HBM0_HBM2_HBM4 
UBC_VR_RAIL_E_P0V75_TRVDD_ZONEB 
UBC_VR_RAIL_E_P0V4_VDDQL_HBM0_HBM2_HBM4 
UBC_VR_RAIL_E_P1V1_VDDC_HBM0_HBM2_HBM4 
UBC_VR_RAIL_E_P0V75_VDDPHY_HBM0_HBM2_HBM4 
UBC_VR_RAIL_E_P0V9_TRVDD_ZONEA 
UBC_VR_RAIL_E_P1V8_VPP_HBM1_HBM3_HBM5 
UBC_VR_RAIL_E_P0V9_TRVDD_ZONEB 
UBC_VR_RAIL_E_P0V4_VDDQL_HBM1_HBM3_HBM5 
UBC_VR_RAIL_E_P1V1_VDDC_HBM1_HBM3_HBM5 
UBC_VR_RAIL_E_P0V75_VDDPHY_HBM1_HBM3_HBM5 
UBC_VR_RAIL_E_P0V8_VDDA_PCIE 
UBC_VR_RAIL_E_P1V2_VDDHTX_PCIE 
UBC_VR_RAIL_E_MAX 
UBC_VR_RAIL_E_UBC1 
UBC_VR_RAIL_E_UBC2 
UBC_VR_RAIL_E_ASIC_P0V75_NUWA0_VDD 
UBC_VR_RAIL_E_ASIC_P0V75_NUWA1_VDD 
UBC_VR_RAIL_E_ASIC_P0V9_OWL_E_TRVDD 
UBC_VR_RAIL_E_ASIC_P0V75_OWL_E_TRVDD 
UBC_VR_RAIL_E_ASIC_P0V75_MAX_M_VDD 
UBC_VR_RAIL_E_ASIC_P0V75_VDDPHY_HBM1357 
UBC_VR_RAIL_E_ASIC_P0V75_OWL_E_VDD 
UBC_VR_RAIL_E_ASIC_P0V4_VDDQL_HBM1357 
UBC_VR_RAIL_E_ASIC_P1V05_VDDC_HBM1357 
UBC_VR_RAIL_E_ASIC_P1V8_VPP_HBM1357 
UBC_VR_RAIL_E_ASIC_P0V9_VDDQ_HBM1357 
UBC_VR_RAIL_E_ASIC_P0V85_HAMSA_VDD 
UBC_VR_RAIL_E_ASIC_P0V75_MAX_N_VDD 
UBC_VR_RAIL_E_ASIC_P0V8_HAMSA_AVDD_PCIE 
UBC_VR_RAIL_E_ASIC_P0V9_VDDQ_HBM0246 
UBC_VR_RAIL_E_ASIC_P1V2_HAMSA_VDDHRXTX_PCIE 
UBC_VR_RAIL_E_ASIC_P1V05_VDDC_HBM0246 
UBC_VR_RAIL_E_ASIC_P1V8_VPP_HBM0246 
UBC_VR_RAIL_E_ASIC_P0V4_VDDQL_HBM0246 
UBC_VR_RAIL_E_ASIC_P0V75_VDDPHY_HBM0246 
UBC_VR_RAIL_E_ASIC_P0V75_OWL_W_VDD 
UBC_VR_RAIL_E_ASIC_P0V75_MAX_S_VDD 
UBC_VR_RAIL_E_ASIC_P0V9_OWL_W_TRVDD 
UBC_VR_RAIL_E_ASIC_P0V75_OWL_W_TRVDD 
UBC_VR_RAIL_E_P3V3_OSFP 
UBC_VR_RAIL_E_MAX 
UBC_VR_RAIL_E_UBC1 
UBC_VR_RAIL_E_UBC2 
UBC_VR_RAIL_E_ASIC_P0V85_MEDHA0_VDD 
UBC_VR_RAIL_E_ASIC_P0V85_MEDHA1_VDD 
UBC_VR_RAIL_E_ASIC_P0V9_OWL_E_TRVDD 
UBC_VR_RAIL_E_ASIC_P0V75_OWL_E_TRVDD 
UBC_VR_RAIL_E_ASIC_P0V75_MAX_M_VDD 
UBC_VR_RAIL_E_ASIC_P0V75_VDDPHY_HBM1357 
UBC_VR_RAIL_E_ASIC_P0V75_OWL_E_VDD 
UBC_VR_RAIL_E_ASIC_P0V4_VDDQL_HBM1357 
UBC_VR_RAIL_E_ASIC_P1V1_VDDQC_HBM1357 
UBC_VR_RAIL_E_ASIC_P1V8_VPP_HBM1357 
UBC_VR_RAIL_E_ASIC_P0V75_MAX_N_VDD 
UBC_VR_RAIL_E_ASIC_P0V8_HAMSA_AVDD_PCIE 
UBC_VR_RAIL_E_ASIC_P1V2_HAMSA_VDDHRXTX_PCIE 
UBC_VR_RAIL_E_ASIC_P0V85_HAMSA_VDD 
UBC_VR_RAIL_E_ASIC_P1V1_VDDQC_HBM0246 
UBC_VR_RAIL_E_ASIC_P1V8_VPP_HBM0246 
UBC_VR_RAIL_E_ASIC_P0V4_VDDQL_HBM0246 
UBC_VR_RAIL_E_ASIC_P0V75_VDDPHY_HBM0246 
UBC_VR_RAIL_E_ASIC_P0V75_OWL_W_VDD 
UBC_VR_RAIL_E_ASIC_P0V75_MAX_S_VDD 
UBC_VR_RAIL_E_ASIC_P0V9_OWL_W_TRVDD 
UBC_VR_RAIL_E_ASIC_P0V75_OWL_W_TRVDD 
UBC_VR_RAIL_E_P3V3_OSFP 
UBC_VR_RAIL_E_MAX 

◆ VR_INDEX_E

enum VR_INDEX_E
Enumerator
VR_INDEX_E_P3V3 
VR_INDEX_E_P0V85 
VR_INDEX_E_P0V75_CH_N 
VR_INDEX_E_P0V75_CH_S 
VR_INDEX_E_P0V75_TRVDD_ZONEA 
VR_INDEX_E_P0V75_TRVDD_ZONEB 
VR_INDEX_E_P1V1_VDDC_HBM0_HBM2_HBM4 
VR_INDEX_E_P0V9_TRVDD_ZONEA 
VR_INDEX_E_P0V9_TRVDD_ZONEB 
VR_INDEX_E_P1V1_VDDC_HBM1_HBM3_HBM5 
VR_INDEX_E_P0V8_VDDA_PCIE 
VR_INDEX_MAX 
VR_INDEX_E_1 
VR_INDEX_E_2 
VR_INDEX_E_3 
VR_INDEX_E_4 
VR_INDEX_E_5 
VR_INDEX_E_6 
VR_INDEX_E_7 
VR_INDEX_E_8 
VR_INDEX_E_9 
VR_INDEX_E_10 
VR_INDEX_E_11 
VR_INDEX_E_12 
VR_INDEX_E_13 
VR_INDEX_E_14 
VR_INDEX_MAX 
VR_INDEX_E_1 
VR_INDEX_E_2 
VR_INDEX_E_3 
VR_INDEX_E_4 
VR_INDEX_E_5 
VR_INDEX_E_6 
VR_INDEX_E_7 
VR_INDEX_E_8 
VR_INDEX_E_9 
VR_INDEX_E_10 
VR_INDEX_E_11 
VR_INDEX_E_12 
VR_INDEX_E_13 
VR_INDEX_MAX 
VR_INDEX_E_P0V895 
VR_INDEX_E_P0V825 
VR_INDEX_MAX 

◆ VR_RAIL_E

enum VR_RAIL_E
Enumerator
VR_RAIL_E_P3V3 
VR_RAIL_E_P0V85_PVDD 
VR_RAIL_E_P0V75_PVDD_CH_N 
VR_RAIL_E_P0V75_MAX_PHY_N 
VR_RAIL_E_P0V75_PVDD_CH_S 
VR_RAIL_E_P0V75_MAX_PHY_S 
VR_RAIL_E_P0V75_TRVDD_ZONEA 
VR_RAIL_E_P1V8_VPP_HBM0_HBM2_HBM4 
VR_RAIL_E_P0V75_TRVDD_ZONEB 
VR_RAIL_E_P0V4_VDDQL_HBM0_HBM2_HBM4 
VR_RAIL_E_P1V1_VDDC_HBM0_HBM2_HBM4 
VR_RAIL_E_P0V75_VDDPHY_HBM0_HBM2_HBM4 
VR_RAIL_E_P0V9_TRVDD_ZONEA 
VR_RAIL_E_P1V8_VPP_HBM1_HBM3_HBM5 
VR_RAIL_E_P0V9_TRVDD_ZONEB 
VR_RAIL_E_P0V4_VDDQL_HBM1_HBM3_HBM5 
VR_RAIL_E_P1V1_VDDC_HBM1_HBM3_HBM5 
VR_RAIL_E_P0V75_VDDPHY_HBM1_HBM3_HBM5 
VR_RAIL_E_P0V8_VDDA_PCIE 
VR_RAIL_E_P1V2_VDDHTX_PCIE 
VR_RAIL_E_MAX 
VR_RAIL_E_ASIC_P0V75_NUWA0_VDD 
VR_RAIL_E_ASIC_P0V75_NUWA1_VDD 
VR_RAIL_E_ASIC_P0V9_OWL_E_TRVDD 
VR_RAIL_E_ASIC_P0V75_OWL_E_TRVDD 
VR_RAIL_E_ASIC_P0V75_MAX_M_VDD 
VR_RAIL_E_ASIC_P0V75_VDDPHY_HBM1357 
VR_RAIL_E_ASIC_P0V75_OWL_E_VDD 
VR_RAIL_E_ASIC_P0V4_VDDQL_HBM1357 
VR_RAIL_E_ASIC_P1V05_VDDC_HBM1357 
VR_RAIL_E_ASIC_P1V8_VPP_HBM1357 
VR_RAIL_E_ASIC_P0V9_VDDQ_HBM1357 
VR_RAIL_E_ASIC_P0V85_HAMSA_VDD 
VR_RAIL_E_ASIC_P0V75_MAX_N_VDD 
VR_RAIL_E_ASIC_P0V8_HAMSA_AVDD_PCIE 
VR_RAIL_E_ASIC_P0V9_VDDQ_HBM0246 
VR_RAIL_E_ASIC_P1V2_HAMSA_VDDHRXTX_PCIE 
VR_RAIL_E_ASIC_P1V05_VDDC_HBM0246 
VR_RAIL_E_ASIC_P1V8_VPP_HBM0246 
VR_RAIL_E_ASIC_P0V4_VDDQL_HBM0246 
VR_RAIL_E_ASIC_P0V75_VDDPHY_HBM0246 
VR_RAIL_E_ASIC_P0V75_OWL_W_VDD 
VR_RAIL_E_ASIC_P0V75_MAX_S_VDD 
VR_RAIL_E_ASIC_P0V9_OWL_W_TRVDD 
VR_RAIL_E_ASIC_P0V75_OWL_W_TRVDD 
VR_RAIL_E_P3V3_OSFP_VOLT_V 
VR_RAIL_E_MAX 
VR_RAIL_E_ASIC_P0V85_MEDHA0_VDD 
VR_RAIL_E_ASIC_P0V85_MEDHA1_VDD 
VR_RAIL_E_ASIC_P0V9_OWL_E_TRVDD 
VR_RAIL_E_ASIC_P0V75_OWL_E_TRVDD 
VR_RAIL_E_ASIC_P0V75_MAX_M_VDD 
VR_RAIL_E_ASIC_P0V75_VDDPHY_HBM1357 
VR_RAIL_E_ASIC_P0V75_OWL_E_VDD 
VR_RAIL_E_ASIC_P0V4_VDDQL_HBM1357 
VR_RAIL_E_ASIC_P1V1_VDDQC_HBM1357 
VR_RAIL_E_ASIC_P1V8_VPP_HBM1357 
VR_RAIL_E_ASIC_P0V75_MAX_N_VDD 
VR_RAIL_E_ASIC_P0V8_HAMSA_AVDD_PCIE 
VR_RAIL_E_ASIC_P1V2_HAMSA_VDDHRXTX_PCIE 
VR_RAIL_E_ASIC_P0V85_HAMSA_VDD 
VR_RAIL_E_ASIC_P1V1_VDDQC_HBM0246 
VR_RAIL_E_ASIC_P1V8_VPP_HBM0246 
VR_RAIL_E_ASIC_P0V4_VDDQL_HBM0246 
VR_RAIL_E_ASIC_P0V75_VDDPHY_HBM0246 
VR_RAIL_E_ASIC_P0V75_OWL_W_VDD 
VR_RAIL_E_ASIC_P0V75_MAX_S_VDD 
VR_RAIL_E_ASIC_P0V9_OWL_W_TRVDD 
VR_RAIL_E_ASIC_P0V75_OWL_W_TRVDD 
VR_RAIL_E_P3V3_OSFP_VOLT_V 
VR_RAIL_E_MAX 
VR_RAIL_E_P0V895_PEX 
VR_RAIL_E_P0V825_A0 
VR_RAIL_E_P0V825_A1 
VR_RAIL_E_P0V825_A2 
VR_RAIL_E_MAX 

◆ VR_STAUS_E

enum VR_STAUS_E
Enumerator
VR_STAUS_E_STATUS_BYTE 
VR_STAUS_E_STATUS_WORD 
VR_STAUS_E_STATUS_VOUT 
VR_STAUS_E_STATUS_IOUT 
VR_STAUS_E_STATUS_INPUT 
VR_STAUS_E_STATUS_TEMPERATURE 
VR_STAUS_E_STATUS_CML 
VR_STAUS_E_MAX 
VR_STAUS_E_STATUS_BYTE 
VR_STAUS_E_STATUS_WORD 
VR_STAUS_E_STATUS_VOUT 
VR_STAUS_E_STATUS_IOUT 
VR_STAUS_E_STATUS_INPUT 
VR_STAUS_E_STATUS_TEMPERATURE 
VR_STAUS_E_STATUS_CML 
VR_STAUS_E_MAX 
VR_STAUS_E_STATUS_BYTE 
VR_STAUS_E_STATUS_WORD 
VR_STAUS_E_STATUS_VOUT 
VR_STAUS_E_STATUS_IOUT 
VR_STAUS_E_STATUS_INPUT 
VR_STAUS_E_STATUS_TEMPERATURE 
VR_STAUS_E_STATUS_CML 
VR_STAUS_E_MAX 
VR_STAUS_E_STATUS_BYTE 
VR_STAUS_E_STATUS_WORD 
VR_STAUS_E_STATUS_VOUT 
VR_STAUS_E_STATUS_IOUT 
VR_STAUS_E_STATUS_INPUT 
VR_STAUS_E_STATUS_TEMPERATURE 
VR_STAUS_E_STATUS_CML 
VR_STAUS_E_MAX 

Function Documentation

◆ bootstrap_default_settings_init()

bool bootstrap_default_settings_init ( void  )

◆ bootstrap_user_settings_init()

bool bootstrap_user_settings_init ( void  )

◆ bootstrap_user_settings_set()

bool bootstrap_user_settings_set ( void *  bootstrap_user_settings)

◆ find_bootstrap_by_rail()

bool find_bootstrap_by_rail ( uint8_t  rail,
bootstrap_mapping_register *  result 
)

◆ get_average_power()

bool get_average_power ( uint8_t  rail,
uint32_t *  milliwatt 
)

◆ get_bootstrap_change_drive_level()

bool get_bootstrap_change_drive_level ( int  rail,
int *  drive_level 
)

◆ get_emc1413_cache_status()

uint8_t get_emc1413_cache_status ( uint8_t  idx)

◆ get_strap_index_max()

uint8_t get_strap_index_max ( )

◆ is_mb_dc_on()

bool is_mb_dc_on ( )

◆ plat_clear_vr_status()

bool plat_clear_vr_status ( uint8_t  rail)

◆ plat_get_alert_level_is_assert()

bool plat_get_alert_level_is_assert ( void  )

◆ plat_get_vout_command()

bool plat_get_vout_command ( uint8_t  rail,
uint16_t *  millivolt 
)

◆ plat_get_vr_status()

bool plat_get_vr_status ( uint8_t  rail,
uint8_t  vr_status_rail,
uint16_t *  vr_status 
)

◆ post_common_sensor_read()

bool post_common_sensor_read ( sensor_cfg *  cfg,
void *  args,
int *const  reading 
)

◆ post_tmp_read()

bool post_tmp_read ( sensor_cfg *  cfg,
void *  args,
int *  reading 
)
Here is the call graph for this function:

◆ post_ubc_read()

bool post_ubc_read ( sensor_cfg *  cfg,
void *  args,
int *  reading 
)

◆ post_vr_read()

bool post_vr_read ( sensor_cfg *  cfg,
void *  args,
int *const  reading 
)

◆ pre_vr_read()

bool pre_vr_read ( sensor_cfg *  cfg,
void *  args 
)

◆ set_bootstrap_table_and_user_settings()

bool set_bootstrap_table_and_user_settings ( uint8_t  rail,
uint8_t *  change_setting_value,
uint8_t  drive_index_level,
bool  is_perm,
bool  is_default 
)

◆ set_bootstrap_table_val_to_ioexp()

bool set_bootstrap_table_val_to_ioexp ( void  )

◆ set_bootstrap_val_to_device()

bool set_bootstrap_val_to_device ( uint8_t  strap,
uint8_t  val 
)

◆ set_ioexp_val_to_bootstrap_table()

bool set_ioexp_val_to_bootstrap_table ( void  )

◆ strap_enum_get()

bool strap_enum_get ( uint8_t *  name,
uint8_t *  num 
)

◆ strap_name_get()

bool strap_name_get ( uint8_t  rail,
uint8_t **  name 
)

◆ temp_threshold_user_settings_get()

bool temp_threshold_user_settings_get ( void *  temp_threshold_user_settings)

◆ ubc_vr_rail_enum_get()

bool ubc_vr_rail_enum_get ( uint8_t *  name,
uint8_t *  num 
)

◆ ubc_vr_rail_name_get()

bool ubc_vr_rail_name_get ( uint8_t  rail,
uint8_t **  name 
)

◆ vr_mutex_get()

void * vr_mutex_get ( enum VR_INDEX_E  vr_index)

◆ vr_mutex_init()

void vr_mutex_init ( void  )

◆ vr_rail_enum_get()

bool vr_rail_enum_get ( uint8_t *  name,
uint8_t *  num 
)

◆ vr_rail_name_get()

bool vr_rail_name_get ( uint8_t  rail,
uint8_t **  name 
)

◆ vr_rail_voltage_peak_clear()

bool vr_rail_voltage_peak_clear ( uint8_t  rail_index)

◆ vr_rail_voltage_peak_get()

bool vr_rail_voltage_peak_get ( uint8_t *  name,
int *  peak_value 
)

◆ vr_status_enum_get()

bool vr_status_enum_get ( uint8_t *  name,
uint8_t *  num 
)

◆ vr_status_name_get()

bool vr_status_name_get ( uint8_t  rail,
uint8_t **  name 
)

◆ vr_vout_range_user_settings_init()

bool vr_vout_range_user_settings_init ( void  )

Variable Documentation

◆ bootstrap_user_settings

bootstrap_user_settings_struct bootstrap_user_settings
extern

◆ mp2971_init_args

mp2971_init_arg mp2971_init_args[]
extern

◆ vout_range_user_settings

vr_vout_range_user_settings_struct vout_range_user_settings
extern