17#ifndef PLAT_PLDM_SENSOR_H
18#define PLAT_PLDM_SENSOR_H
23#define QUICK_POLL_INTERVAL 0xFF
24#define VR_DEFAULT_POLLING_INTERVAL_MS 1000
26#define ADDR_UNKNOWN (0xFF >> 1)
30#define TOP_INLET_ADDR (0x92 >> 1)
31#define BOT_INLET_ADDR (0x94 >> 1)
32#define BOT_OUTLET_ADDR (0x96 >> 1)
36#define ASIC_NUWA0_SENSOR0_ADDR (0x98 >> 1)
37#define ASIC_NUWA0_SENSOR1_ADDR (0x98 >> 1)
39#define ASIC_OWL_W_ADDR (0x9A >> 1)
40#define ASIC_OWL_E_ADDR (0x9A >> 1)
42#define ASIC_HAMSA_CRM_ADDR (0x98 >> 1)
43#define ASIC_HAMSA_LS_ADDR (0x98 >> 1)
45#define ASIC_NUWA1_SENSOR0_ADDR (0x9A >> 1)
46#define ASIC_NUWA1_SENSOR1_ADDR (0x9A >> 1)
50#define ASIC_NUWA0_SENSOR0_EMC1413_ADDR (0xD8 >> 1)
51#define ASIC_NUWA0_SENSOR1_EMC1413_ADDR (0xD8 >> 1)
53#define ASIC_OWL_W_EMC1413_ADDR (0x38 >> 1)
54#define ASIC_OWL_E_EMC1413_ADDR (0x38 >> 1)
56#define ASIC_HAMSA_CRM_EMC1413_ADDR (0xD8 >> 1)
57#define ASIC_HAMSA_LS_EMC1413_ADDR (0xD8 >> 1)
59#define ASIC_NUWA1_SENSOR0_EMC1413_ADDR (0x38 >> 1)
60#define ASIC_NUWA1_SENSOR1_EMC1413_ADDR (0x38 >> 1)
64#define ASIC_P0V75_NUWA0_VDD_ADDR (0x50 >> 1)
66#define ASIC_P0V75_NUWA1_VDD_ADDR (0x4C >> 1)
68#define ASIC_P0V9_OWL_E_TRVDD_ADDR (0xEE >> 1)
69#define ASIC_P0V75_OWL_E_TRVDD_ADDR (0xEE >> 1)
71#define ASIC_P0V75_MAX_M_VDD_ADDR (0xEA >> 1)
72#define ASIC_P0V75_VDDPHY_HBM1357_ADDR (0xEA >> 1)
74#define ASIC_P0V75_OWL_E_VDD_ADDR (0xE2 >> 1)
75#define ASIC_P0V4_VDDQL_HBM1357_ADDR (0xE2 >> 1)
77#define ASIC_P1V05_VDDC_HBM1357_ADDR (0xEC >> 1)
78#define ASIC_P1V8_VPP_HBM1357_ADDR (0xEC >> 1)
80#define ASIC_P0V9_VDDQ_HBM1357_ADDR (0xD0 >> 1)
81#define ASIC_P0V85_HAMSA_VDD_ADDR (0xD0 >> 1)
83#define ASIC_P0V75_MAX_N_VDD_ADDR (0xD6 >> 1)
84#define ASIC_P0V8_HAMSA_AVDD_PCIE_ADDR (0xD6 >> 1)
86#define ASIC_P0V9_VDDQ_HBM0246_ADDR (0xD2 >> 1)
87#define ASIC_P1V2_HAMSA_VDDHRXTX_PCIE_ADDR (0xD2 >> 1)
89#define ASIC_P1V05_VDDC_HBM0246_ADDR (0xE0 >> 1)
90#define ASIC_P1V8_VPP_HBM0246_ADDR (0xE0 >> 1)
92#define ASIC_P0V4_VDDQL_HBM0246_ADDR (0xE4 >> 1)
93#define ASIC_P0V75_VDDPHY_HBM0246_ADDR (0xE4 >> 1)
95#define ASIC_P0V75_OWL_W_VDD_ADDR (0xE6 >> 1)
96#define ASIC_P0V75_MAX_S_VDD_ADDR (0xE6 >> 1)
98#define ASIC_P0V9_OWL_W_TRVDD_ADDR (0xD8 >> 1)
99#define ASIC_P0V75_OWL_W_TRVDD_ADDR (0xD8 >> 1)
103#define ASIC_P0V75_NUWA0_VDD_RNS_ADDR (0xEC >> 1)
105#define ASIC_P0V75_NUWA1_VDD_RNS_ADDR (0xE4 >> 1)
107#define ASIC_P0V9_OWL_E_TRVDD_RNS_ADDR (0xC0 >> 1)
108#define ASIC_P0V75_OWL_E_TRVDD_RNS_ADDR (0xC0 >> 1)
110#define ASIC_P0V75_MAX_M_VDD_RNS_ADDR (0xE8 >> 1)
111#define ASIC_P0V75_VDDPHY_HBM1357_RNS_ADDR (0xE8 >> 1)
113#define ASIC_P0V75_OWL_E_VDD_RNS_ADDR (0xC2 >> 1)
114#define ASIC_P0V4_VDDQL_HBM1357_RNS_ADDR (0xC2 >> 1)
116#define ASIC_P1V05_VDDC_HBM1357_RNS_ADDR (0xC6 >> 1)
117#define ASIC_P1V8_VPP_HBM1357_RNS_ADDR (0xC6 >> 1)
119#define ASIC_P0V9_VDDQ_HBM1357_RNS_ADDR (0xEA >> 1)
120#define ASIC_P0V85_HAMSA_VDD_RNS_ADDR (0xEA >> 1)
122#define ASIC_P0V75_MAX_N_VDD_RNS_ADDR (0xC2 >> 1)
123#define ASIC_P0V8_HAMSA_AVDD_PCIE_RNS_ADDR (0xC2 >> 1)
125#define ASIC_P0V9_VDDQ_HBM0246_RNS_ADDR (0xC6 >> 1)
126#define ASIC_P1V2_HAMSA_VDDHRXTX_PCIE_RNS_ADDR (0xC6 >> 1)
128#define ASIC_P1V05_VDDC_HBM0246_RNS_ADDR (0xC0 >> 1)
129#define ASIC_P1V8_VPP_HBM0246_RNS_ADDR (0xC0 >> 1)
131#define ASIC_P0V4_VDDQL_HBM0246_RNS_ADDR (0xE8 >> 1)
132#define ASIC_P0V75_VDDPHY_HBM0246_RNS_ADDR (0xE8 >> 1)
134#define ASIC_P0V75_OWL_W_VDD_RNS_ADDR (0xE4 >> 1)
135#define ASIC_P0V75_MAX_S_VDD_RNS_ADDR (0xE4 >> 1)
137#define ASIC_P0V9_OWL_W_TRVDD_RNS_ADDR (0xEA >> 1)
138#define ASIC_P0V75_OWL_W_TRVDD_RNS_ADDR (0xEA >> 1)
141#define UBC1_ADDR (0x2E >> 1)
142#define UBC2_ADDR (0x34 >> 1)
144#define P3V3_OSFP_ADDR (0xFA >> 1)
302#define TMP75_TEMP_OFFSET 0x00
303#define UPDATE_INTERVAL_1S 1
304#define UPDATE_INTERVAL_5S 5
305#define UPDATE_INTERVAL_60S 60
307#define ONE_STEP_POWER_MAGIC_NUMBER 0x56
349void change_sensor_cfg(uint8_t asic_board_id, uint8_t tmp_module, uint8_t vr_module,
350 uint8_t ubc_module, uint8_t board_rev_id);
uint8_t addr
Definition: isl69259.c:0
uint_least16_t char16_t
Definition: libutil.h:86
PDR_numeric_sensor * numeric_sensor_table
Definition: pdr.c:32
PDR_numeric_sensor
Definition: pdr.h:134
uint8_t type
Definition: pldm_base.h:0
uint32_t offset
Definition: pldm_firmware_update.h:0
uint16_t sensor_id
Definition: pldm_monitor.h:0
uint8_t sensor_num
Definition: storage_handler.h:6
Definition: plat_pldm_sensor.h:318
uint16_t case_time_ms[8]
Definition: plat_pldm_sensor.h:320
uint8_t sensor_id
Definition: plat_pldm_sensor.h:319