OpenBIC
OpenSource Bridge-IC
plat_isr.c File Reference
#include <logging/log.h>
#include <stdlib.h>
#include <pmbus.h>
#include "libipmi.h"
#include "app_handler.h"
#include "kcs.h"
#include "rg3mxxb12.h"
#include "p3h284x.h"
#include "power_status.h"
#include "sensor.h"
#include "snoop.h"
#include "apml.h"
#include "hal_gpio.h"
#include "hal_i2c.h"
#include "hal_i3c.h"
#include "util_sys.h"
#include "util_worker.h"
#include "plat_gpio.h"
#include "plat_class.h"
#include "plat_pldm_sensor.h"
#include "plat_sensor_table.h"
#include "plat_i2c.h"
#include "plat_mctp.h"
#include "plat_apml.h"
#include "plat_i3c.h"
#include "plat_isr.h"
#include "plat_dimm.h"
#include "pcc.h"
#include "plat_pmic.h"
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Macros

#define MB_THROTTLE_WORKQ_STACK_SIZE   1024
 
#define MB_THROTTLE_WORKQ_PRIORITY   K_PRIO_PREEMPT(2)
 
#define SYS_THROTTLE_WORKQ_STACK_SIZE   1024
 
#define SYS_THROTTLE_WORKQ_PRIORITY   K_PRIO_PREEMPT(2)
 
#define POST_TIMEOUT_SECONDS   1200
 
#define DC_ON_5_SECOND   5
 
#define PROC_FAIL_START_DELAY_SECOND   10
 
#define VR_EVENT_DELAY_MS   10
 
#define READ_PMIC_CRITICAL_ERROR_MS   200
 
#define DETECT_VR_WDT_DELAY_S   10
 

Functions

 LOG_MODULE_REGISTER (plat_isr, LOG_LEVEL_DBG)
 
void init_event_work ()
 
void addsel_work_handler (struct k_work *work_item)
 
void reinit_i3c_hub ()
 
void set_ffwf_eid ()
 
void switch_i3c_dimm_mux_to_cpu ()
 
 K_WORK_DELAYABLE_DEFINE (set_DC_on_5s_work, set_DC_on_delayed_status)
 
 K_WORK_DEFINE (reinit_i3c_work, reinit_i3c_hub)
 
 K_WORK_DEFINE (set_ffwf_eid_work, set_ffwf_eid)
 
 K_WORK_DEFINE (switch_i3c_dimm_work, switch_i3c_dimm_mux_to_cpu)
 
 K_WORK_DELAYABLE_DEFINE (PROC_FAIL_work, PROC_FAIL_handler)
 
 K_WORK_DELAYABLE_DEFINE (ABORT_FRB2_WDT_THREAD, abort_frb2_wdt_thread)
 
 K_WORK_DELAYABLE_DEFINE (read_pmic_critical_work, read_pmic_error_when_dc_off)
 
 K_THREAD_STACK_DEFINE (mb_throttle_workq_stack, MB_THROTTLE_WORKQ_STACK_SIZE)
 
 K_THREAD_STACK_DEFINE (sys_throttle_workq_stack, SYS_THROTTLE_WORKQ_STACK_SIZE)
 
void init_fastprochot_work_q (void)
 
void init_throttle_work_q (void)
 
void add_post_timeout_sel_work_handler (struct k_work *work)
 
void init_post_timeout_event_work (void)
 
 K_TIMER_DEFINE (power_on_timer, post_timeout_handler, NULL)
 
void post_timeout_handler (struct k_timer *timer_id)
 
void ISR_DC_ON ()
 
void ISR_POST_COMPLETE ()
 
void ISR_BMC_READY ()
 
void ISR_WF_BIC_READY ()
 
 K_WORK_DELAYABLE_DEFINE (SLP3_work, SLP3_handler)
 
void ISR_SLP3 ()
 
void ISR_DBP_PRSNT ()
 
void ISR_MB_THROTTLE ()
 
void ISR_SOC_THMALTRIP ()
 
void ISR_SYS_THROTTLE ()
 
void ISR_HSC_OC ()
 
void init_vr_event_work ()
 
void process_vr_power_fault_sel (struct k_work *work_item)
 
void ISR_VR_PWR_FAULT ()
 
void ISR_UV_DETECT ()
 
void IST_PLTRST ()
 
 K_WORK_DELAYABLE_DEFINE (APML_ALERT_work, APML_ALERT_handler)
 
void ISR_APML_ALERT ()
 
void ISR_CPU_SMERR_BIC ()
 

Variables

uint8_t hw_event_register [13] = { 0 }
 
add_vr_sel_info vr_event_work_item []
 
add_sel_info event_work_items []
 
struct k_work_q mb_throttle_work_q
 
struct k_work_q sys_throttle_work_q
 
const vr_fault_info vr_fault_table []
 
const cpld_reg_info cpld_reg_table [CPLD_REG_INFO_IDX_MAX]
 
const uint8_t vr_reg_list [][9]
 

Macro Definition Documentation

◆ DC_ON_5_SECOND

#define DC_ON_5_SECOND   5

◆ DETECT_VR_WDT_DELAY_S

#define DETECT_VR_WDT_DELAY_S   10

◆ MB_THROTTLE_WORKQ_PRIORITY

#define MB_THROTTLE_WORKQ_PRIORITY   K_PRIO_PREEMPT(2)

◆ MB_THROTTLE_WORKQ_STACK_SIZE

#define MB_THROTTLE_WORKQ_STACK_SIZE   1024

◆ POST_TIMEOUT_SECONDS

#define POST_TIMEOUT_SECONDS   1200

◆ PROC_FAIL_START_DELAY_SECOND

#define PROC_FAIL_START_DELAY_SECOND   10

◆ READ_PMIC_CRITICAL_ERROR_MS

#define READ_PMIC_CRITICAL_ERROR_MS   200

◆ SYS_THROTTLE_WORKQ_PRIORITY

#define SYS_THROTTLE_WORKQ_PRIORITY   K_PRIO_PREEMPT(2)

◆ SYS_THROTTLE_WORKQ_STACK_SIZE

#define SYS_THROTTLE_WORKQ_STACK_SIZE   1024

◆ VR_EVENT_DELAY_MS

#define VR_EVENT_DELAY_MS   10

Function Documentation

◆ add_post_timeout_sel_work_handler()

void add_post_timeout_sel_work_handler ( struct k_work *  work)
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◆ addsel_work_handler()

void addsel_work_handler ( struct k_work *  work_item)
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◆ init_event_work()

void init_event_work ( )
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◆ init_fastprochot_work_q()

void init_fastprochot_work_q ( void  )

◆ init_post_timeout_event_work()

void init_post_timeout_event_work ( void  )

◆ init_throttle_work_q()

void init_throttle_work_q ( void  )

◆ init_vr_event_work()

void init_vr_event_work ( )
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◆ ISR_APML_ALERT()

void ISR_APML_ALERT ( )

◆ ISR_BMC_READY()

void ISR_BMC_READY ( )
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◆ ISR_CPU_SMERR_BIC()

void ISR_CPU_SMERR_BIC ( )
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◆ ISR_DBP_PRSNT()

void ISR_DBP_PRSNT ( )
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◆ ISR_DC_ON()

void ISR_DC_ON ( )
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◆ ISR_HSC_OC()

void ISR_HSC_OC ( )
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◆ ISR_MB_THROTTLE()

void ISR_MB_THROTTLE ( )
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◆ ISR_POST_COMPLETE()

void ISR_POST_COMPLETE ( )
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◆ ISR_SLP3()

void ISR_SLP3 ( )
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◆ ISR_SOC_THMALTRIP()

void ISR_SOC_THMALTRIP ( )
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◆ ISR_SYS_THROTTLE()

void ISR_SYS_THROTTLE ( )
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◆ ISR_UV_DETECT()

void ISR_UV_DETECT ( )
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◆ ISR_VR_PWR_FAULT()

void ISR_VR_PWR_FAULT ( )
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◆ ISR_WF_BIC_READY()

void ISR_WF_BIC_READY ( )

◆ IST_PLTRST()

void IST_PLTRST ( )

◆ K_THREAD_STACK_DEFINE() [1/2]

K_THREAD_STACK_DEFINE ( mb_throttle_workq_stack  ,
MB_THROTTLE_WORKQ_STACK_SIZE   
)

◆ K_THREAD_STACK_DEFINE() [2/2]

K_THREAD_STACK_DEFINE ( sys_throttle_workq_stack  ,
SYS_THROTTLE_WORKQ_STACK_SIZE   
)

◆ K_TIMER_DEFINE()

K_TIMER_DEFINE ( power_on_timer  ,
post_timeout_handler  ,
NULL   
)

◆ K_WORK_DEFINE() [1/3]

K_WORK_DEFINE ( reinit_i3c_work  ,
reinit_i3c_hub   
)

◆ K_WORK_DEFINE() [2/3]

K_WORK_DEFINE ( set_ffwf_eid_work  ,
set_ffwf_eid   
)

◆ K_WORK_DEFINE() [3/3]

K_WORK_DEFINE ( switch_i3c_dimm_work  ,
switch_i3c_dimm_mux_to_cpu   
)

◆ K_WORK_DELAYABLE_DEFINE() [1/6]

K_WORK_DELAYABLE_DEFINE ( ABORT_FRB2_WDT_THREAD  ,
abort_frb2_wdt_thread   
)

◆ K_WORK_DELAYABLE_DEFINE() [2/6]

K_WORK_DELAYABLE_DEFINE ( APML_ALERT_work  ,
APML_ALERT_handler   
)

◆ K_WORK_DELAYABLE_DEFINE() [3/6]

K_WORK_DELAYABLE_DEFINE ( PROC_FAIL_work  ,
PROC_FAIL_handler   
)

◆ K_WORK_DELAYABLE_DEFINE() [4/6]

K_WORK_DELAYABLE_DEFINE ( read_pmic_critical_work  ,
read_pmic_error_when_dc_off   
)

◆ K_WORK_DELAYABLE_DEFINE() [5/6]

K_WORK_DELAYABLE_DEFINE ( set_DC_on_5s_work  ,
set_DC_on_delayed_status   
)

◆ K_WORK_DELAYABLE_DEFINE() [6/6]

K_WORK_DELAYABLE_DEFINE ( SLP3_work  ,
SLP3_handler   
)

◆ LOG_MODULE_REGISTER()

LOG_MODULE_REGISTER ( plat_isr  ,
LOG_LEVEL_DBG   
)

◆ post_timeout_handler()

void post_timeout_handler ( struct k_timer *  timer_id)

◆ process_vr_power_fault_sel()

void process_vr_power_fault_sel ( struct k_work *  work_item)
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◆ reinit_i3c_hub()

void reinit_i3c_hub ( )

◆ set_ffwf_eid()

void set_ffwf_eid ( )
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◆ switch_i3c_dimm_mux_to_cpu()

void switch_i3c_dimm_mux_to_cpu ( )
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Variable Documentation

◆ cpld_reg_table

const cpld_reg_info cpld_reg_table[CPLD_REG_INFO_IDX_MAX]
Initial value:
= {
}
#define CPLD_IO_I2C_ADDR
Definition: plat_i2c.h:38
#define CPLD_IO_I2C_BUS
Definition: plat_i2c.h:37

◆ event_work_items

add_sel_info event_work_items[]

◆ hw_event_register

uint8_t hw_event_register[13] = { 0 }

◆ mb_throttle_work_q

struct k_work_q mb_throttle_work_q

◆ sys_throttle_work_q

struct k_work_q sys_throttle_work_q

◆ vr_event_work_item

add_vr_sel_info vr_event_work_item[]
Initial value:
= {
{
.is_init = false,
.gpio_num = FM_SOL_UART_CH_SEL_R,
},
}

◆ vr_fault_table

const vr_fault_info vr_fault_table[]
Initial value:
= {
{ P1V5_RETIMER_1, CPLD_REG_INFO_IDX_0, BIT(2), false, 0, 0, 0 },
{ P0V9_STBY_1, CPLD_REG_INFO_IDX_0, BIT(0), false, 0, 0, 0 },
{ P3V3_E1S_0, CPLD_REG_INFO_IDX_2, BIT(3), false, 0, 0, 0 },
{ P3V3_E1S_1, CPLD_REG_INFO_IDX_2, BIT(2), false, 0, 0, 0 },
{ P12V_E1S_0, CPLD_REG_INFO_IDX_2, BIT(1), false, 0, 0, 0 },
{ P12V_E1S_1, CPLD_REG_INFO_IDX_2, BIT(0), false, 0, 0, 0 },
}
#define I2C_BUS4
Definition: plat_i2c.h:27
@ P3V3_E1S_1
Definition: pldm_oem.h:125
@ PVDDCR_CPU1
Definition: pldm_oem.h:111
@ P12V_E1S_0
Definition: pldm_oem.h:126
@ P0V9_STBY_1
Definition: pldm_oem.h:123
@ PVDDCR_SOC
Definition: pldm_oem.h:110
@ PVDDIO
Definition: pldm_oem.h:112
@ P3V3_E1S_0
Definition: pldm_oem.h:124
@ P12V_E1S_1
Definition: pldm_oem.h:127
@ PVDD11_S3
Definition: pldm_oem.h:113
@ P1V5_RETIMER_1
Definition: pldm_oem.h:122
@ PVDDCR_CPU0
Definition: pldm_oem.h:109
@ CPLD_REG_INFO_IDX_2
Definition: plat_isr.h:58
@ CPLD_REG_INFO_IDX_1
Definition: plat_isr.h:57
@ CPLD_REG_INFO_IDX_0
Definition: plat_isr.h:56
#define ADDR_VR_CPU0
Definition: plat_pldm_sensor.h:25
#define ADDR_VR_CPU1
Definition: plat_pldm_sensor.h:27
#define ADDR_VR_PVDDIO
Definition: plat_pldm_sensor.h:28
#define ADDR_VR_SOC
Definition: plat_pldm_sensor.h:26
#define ADDR_VR_PVDD11
Definition: plat_pldm_sensor.h:29

◆ vr_reg_list

const uint8_t vr_reg_list[][9]
Initial value:
= {
}
@ PMBUS_STATUS_WORD
Definition: pmbus.h:102
@ PMBUS_STATUS_IOUT
Definition: pmbus.h:104
@ PMBUS_STATUS_MFR_SPECIFIC
Definition: pmbus.h:109
@ PMBUS_STATUS_BYTE
Definition: pmbus.h:101
@ PMBUS_STATUS_CML
Definition: pmbus.h:107
@ PMBUS_STATUS_OTHER
Definition: pmbus.h:108
@ PMBUS_STATUS_TEMPERATURE
Definition: pmbus.h:106
@ PMBUS_STATUS_VOUT
Definition: pmbus.h:103
@ PMBUS_STATUS_INPUT
Definition: pmbus.h:105