plat_isr.c File Reference

#include "plat_isr.h"
#include <logging/log.h>
#include "libipmi.h"
#include "kcs.h"
#include "power_status.h"
#include "sensor.h"
#include "snoop.h"
#include "plat_gpio.h"
#include "plat_class.h"
#include "plat_ipmi.h"
#include "plat_sensor_table.h"
#include "plat_i2c.h"
#include "plat_pmic.h"
#include "plat_dimm.h"
#include "oem_1s_handler.h"
#include "hal_gpio.h"
#include "hal_i2c.h"
#include "util_sys.h"
#include "util_worker.h"
#include "plat_mctp.h"
#include "plat_power.h"
#include "pmbus.h"
#include "vr_fault.h"

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Macros
#define	DETECT_VR_WDT_DELAY_S   10
#define	DC_ON_5_SECOND   5
#define	READ_PMIC_CRITICAL_ERROR_MS   100
#define	PROC_FAIL_START_DELAY_SECOND   10
#define	CATERR_START_DELAY_SECOND   2
#define	MB_THROTTLE_DELAY_US   4

Functions
	LOG_MODULE_REGISTER (plat_isr)
void	send_gpio_interrupt (uint8_t gpio_num)
	K_WORK_DELAYABLE_DEFINE (SLP3_work, SLP3_handler)
void	ISR_SLP3 ()
void	ISR_POST_COMPLETE ()
	K_WORK_DELAYABLE_DEFINE (set_DC_on_5s_work, set_DC_on_delayed_status)
	K_WORK_DELAYABLE_DEFINE (read_pmic_critical_work, read_pmic_error_when_dc_off)
void	ISR_DC_ON ()
void	ISR_BMC_PRDY ()
	K_WORK_DELAYABLE_DEFINE (PROC_FAIL_work, PROC_FAIL_handler)
void	ISR_PWRGD_CPU ()
	K_WORK_DELAYABLE_DEFINE (CAT_ERR_work, CAT_ERR_handler)
void	ISR_CATERR ()
void	ISR_PLTRST ()
void	ISR_DBP_PRSNT ()
void	ISR_FM_THROTTLE ()
void	ISR_HSC_THROTTLE ()
bool	pal_skip_pmbus_cmd_code (uint8_t vendor_type, uint8_t cmd, uint8_t page)
void	init_vr_pwr_fault_work ()
void	ISR_VR_PWR_FAULT ()
	K_WORK_DELAYABLE_DEFINE (mb_throttle_work, mb_throttle_handler)
void	ISR_MB_THROTTLE ()
void	ISR_SOC_THMALTRIP ()
void	ISR_SYS_THROTTLE ()
void	ISR_PCH_THMALTRIP ()
void	ISR_HSC_OC ()
void	ISR_CPU_MEMHOT ()
void	ISR_CPUVR_HOT ()
void	ISR_PCH_PWRGD ()
void	ISR_RMCA ()
void	ISR_CPU_VPP_INT ()
void	ISR_NMI ()
void	ISR_RST_PLTRST_PLD ()
void	smi_handler ()
	K_WORK_DELAYABLE_DEFINE (smi_work, smi_handler)
void	ISR_SMI ()

Variables
uint8_t	_1ou_m2_name_mapping_table [4]
add_vr_sel_info	vr_pwr_fault_work_item
const vr_pwr_fault_t	vr_pwr_fault_table []
const size_t	vr_pwr_fault_table_size = ARRAY_SIZE(vr_pwr_fault_table)
const cpld_vr_reg_t	cpld_vr_reg_table = { I2C_BUS1, CPLD_ADDR, CPLD_VR_FAULT_REG }

Macro Definition Documentation

CATERR_START_DELAY_SECOND

#define CATERR_START_DELAY_SECOND   2

DC_ON_5_SECOND

#define DC_ON_5_SECOND   5

DETECT_VR_WDT_DELAY_S

#define DETECT_VR_WDT_DELAY_S   10

MB_THROTTLE_DELAY_US

#define MB_THROTTLE_DELAY_US   4

PROC_FAIL_START_DELAY_SECOND

#define PROC_FAIL_START_DELAY_SECOND   10

READ_PMIC_CRITICAL_ERROR_MS

#define READ_PMIC_CRITICAL_ERROR_MS   100

Function Documentation

init_vr_pwr_fault_work()

void init_vr_pwr_fault_work

(

)

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ISR_BMC_PRDY()

void ISR_BMC_PRDY

(

)

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ISR_CATERR()

void ISR_CATERR

(

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ISR_CPU_MEMHOT()

void ISR_CPU_MEMHOT

(

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ISR_CPU_VPP_INT()

void ISR_CPU_VPP_INT

(

)

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ISR_CPUVR_HOT()

void ISR_CPUVR_HOT

(

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ISR_DBP_PRSNT()

void ISR_DBP_PRSNT

(

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ISR_DC_ON()

void ISR_DC_ON

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ISR_FM_THROTTLE()

void ISR_FM_THROTTLE

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ISR_HSC_OC()

void ISR_HSC_OC

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ISR_HSC_THROTTLE()

void ISR_HSC_THROTTLE

(

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ISR_MB_THROTTLE()

void ISR_MB_THROTTLE

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ISR_NMI()

void ISR_NMI

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ISR_PCH_PWRGD()

void ISR_PCH_PWRGD

(

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ISR_PCH_THMALTRIP()

void ISR_PCH_THMALTRIP

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ISR_PLTRST()

void ISR_PLTRST

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ISR_POST_COMPLETE()

void ISR_POST_COMPLETE

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ISR_PWRGD_CPU()

void ISR_PWRGD_CPU

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ISR_RMCA()

void ISR_RMCA

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ISR_RST_PLTRST_PLD()

void ISR_RST_PLTRST_PLD

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ISR_SLP3()

void ISR_SLP3

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ISR_SMI()

void ISR_SMI

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ISR_SOC_THMALTRIP()

void ISR_SOC_THMALTRIP

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ISR_SYS_THROTTLE()

void ISR_SYS_THROTTLE

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ISR_VR_PWR_FAULT()

void ISR_VR_PWR_FAULT

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K_WORK_DELAYABLE_DEFINE() [1/7]

K_WORK_DELAYABLE_DEFINE	(	CAT_ERR_work	,
		CAT_ERR_handler
	)

K_WORK_DELAYABLE_DEFINE() [2/7]

K_WORK_DELAYABLE_DEFINE	(	mb_throttle_work	,
		mb_throttle_handler
	)

K_WORK_DELAYABLE_DEFINE() [3/7]

K_WORK_DELAYABLE_DEFINE	(	PROC_FAIL_work	,
		PROC_FAIL_handler
	)

K_WORK_DELAYABLE_DEFINE() [4/7]

K_WORK_DELAYABLE_DEFINE	(	read_pmic_critical_work	,
		read_pmic_error_when_dc_off
	)

K_WORK_DELAYABLE_DEFINE() [5/7]

K_WORK_DELAYABLE_DEFINE	(	set_DC_on_5s_work	,
		set_DC_on_delayed_status
	)

K_WORK_DELAYABLE_DEFINE() [6/7]

K_WORK_DELAYABLE_DEFINE	(	SLP3_work	,
		SLP3_handler
	)

K_WORK_DELAYABLE_DEFINE() [7/7]

K_WORK_DELAYABLE_DEFINE	(	smi_work	,
		smi_handler
	)

LOG_MODULE_REGISTER()

LOG_MODULE_REGISTER

(

plat_isr

)

pal_skip_pmbus_cmd_code()

bool pal_skip_pmbus_cmd_code	(	uint8_t	vendor_type,
		uint8_t	cmd,
		uint8_t	page
	)

send_gpio_interrupt()

void send_gpio_interrupt

(

uint8_t

gpio_num

)

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smi_handler()

void smi_handler

(

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Variable Documentation

_1ou_m2_name_mapping_table

uint8_t _1ou_m2_name_mapping_table[4]

Initial value:

= {
    0x3A,
    0x3C,
    0x3E,
    0x37,
}

cpld_vr_reg_table

const cpld_vr_reg_t cpld_vr_reg_table = { I2C_BUS1, CPLD_ADDR, CPLD_VR_FAULT_REG }

vr_pwr_fault_table

const vr_pwr_fault_t vr_pwr_fault_table[]

Initial value:

= {
    { BIT(0), IPMI_EVENT_VR_PWR_FAULT_PVCCD_HV, I2C_BUS5, PVCCD_ADDR, 0 },
    { BIT(1), IPMI_EVENT_VR_PWR_FAULT_VCCIN, I2C_BUS5, PVCCIN_FIVRA_ADDR, 0 },
    { BIT(2), IPMI_EVENT_VR_PWR_FAULT_PVCCINFAON, I2C_BUS5, FAON_EHV_ADDR, 0 },
    { BIT(3), IPMI_EVENT_VR_PWR_FAULT_PVCCFA_EHV_FIVRA, I2C_BUS5, PVCCIN_FIVRA_ADDR, 1 },
    { BIT(4), IPMI_EVENT_VR_PWR_FAULT_PVCCFA_EHV, I2C_BUS5, FAON_EHV_ADDR, 1 },
}

vr_pwr_fault_table_size

const size_t vr_pwr_fault_table_size = ARRAY_SIZE(vr_pwr_fault_table)

vr_pwr_fault_work_item

add_vr_sel_info vr_pwr_fault_work_item