sdr.h File Reference

#include <stdbool.h>
#include <stdint.h>

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Classes
struct	_SDR_Full_sensor_
struct	_SDR_INFO_

Macros
#define	IPMI_SDR_VER_15   0x51
#define	IPMI_SDR_FULL_SENSOR   0x01
#define	IPMI_SDR_COMPACT_SENSOR   0x02
#define	IPMI_SDR_EVENT_ONLY   0x03
#define	IPMI_SDR_HEADER_LEN   5
#define	IPMI_SDR_FULL_SENSOR_MIN_LEN   43
#define	IPMI_SDR_COMPACT_SENSOR_MIN_LEN   27
#define	IPMI_SDR_EVENT_SENSOR_MIN_LEN   12
#define	IPMI_SDR_FRU_SENSOR_MIN_LEN   11
#define	IPMI_SDR_MC_SENSOR_MIN_LEN   11
#define	IPMI_SDR_ENTITY_ID_OTHER   0x01
#define	IPMI_SDR_ENTITY_ID_UNKNOWN   0x02
#define	IPMI_SDR_ENTITY_ID_PROCESSOR   0x03
#define	IPMI_SDR_ENTITY_ID_DISK   0x04
#define	IPMI_SDR_ENTITY_ID_SYS_MGT_MOD   0x06
#define	IPMI_SDR_ENTITY_ID_SYS_BOARD   0x07
#define	IPMI_SDR_ENTITY_ID_MEM_MODULE   0x08
#define	IPMI_SDR_ENTITY_ID_POWER_SUPPLY   0x0A
#define	IPMI_SDR_ENTITY_ID_ADDIN_CARD   0x0B
#define	IPMI_SDR_ENTITY_ID_FRONT_PANEL   0x0C
#define	IPMI_SDR_ENTITY_ID_BACK_PANEL   0x0D
#define	IPMI_SDR_ENTITY_ID_POWER_SYSTEM_BOARD   0x0E
#define	IPMI_SDR_ENTITY_ID_BACKPLANE   0x0F
#define	IPMI_SDR_ENTITY_ID_INTERNAL_EXPANSION_BOARD   0x10
#define	IPMI_SDR_ENTITY_ID_OTHER_SYSTEM_BOARD   0x11
#define	IPMI_SDR_ENTITY_ID_PROCESSOR_BOARD   0x12
#define	IPMI_SDR_ENTITY_ID_POWER_UNIT   0x13
#define	IPMI_SDR_ENTITY_ID_POWER_MODULE   0x14
#define	IPMI_SDR_ENTITY_ID_PDB   0x15
#define	IPMI_SDR_ENTITY_ID_CHASSIS_BACK_PANEL_BOARD   0x16
#define	IPMI_SDR_ENTITY_ID_SYS_CHASSIS   0x17
#define	IPMI_SDR_ENTITY_ID_FAN_DEVICE   0x1D
#define	IPMI_SDR_ENTITY_ID_MEMORY   0x20
#define	IPMI_SDR_ENTITY_ID_SYS_FW   0x22
#define	IPMI_SDR_ENTITY_ID_OS   0x23
#define	IPMI_SDR_ENTITY_ID_SYS_BUS   0x24
#define	IPMI_SDR_ENTITY_ID_BATTERY   0x28
#define	IPMI_SDR_ENTITY_ID_IO_MODULE   0x2C
#define	IPMI_SDR_ENTITY_ID_PROCESSOR_IO   0x2D
#define	IPMI_SDR_ENTITY_ID_MC_FW   0x2E
#define	IPMI_SDR_ENTITY_ID_PCI_BUS   0x30
#define	IPMI_SDR_ENTITY_ID_PCIE_BUS   0x31
#define	IPMI_SDR_ENTITY_ID_SCSI_BUS   0x32
#define	IPMI_SDR_ENTITY_ID_SATA_BUS   0x33
#define	IPMI_SDR_ENTITY_ID_FSB   0x34
#define	IPMI_SDR_ENTITY_ID_AIR_INLET   0x37
#define	IPMI_SDR_ENTITY_ID_PROCESSOR_DCMI   0x41
#define	IPMI_SDR_ENTITY_ID_SYS_BOARD_DCMI   0x42
#define	IPMI_SDR_SENSOR_TYPE_TEMPERATURE   0x01
#define	IPMI_SDR_SENSOR_TYPE_VOLTAGE   0x02
#define	IPMI_SDR_SENSOR_TYPE_CURRENT   0x03
#define	IPMI_SDR_SENSOR_TYPE_FAN   0x04
#define	IPMI_SDR_SENSOR_TYPE_PHY_SECURITY   0x05
#define	IPMI_SDR_SENSOR_TYPE_SECURITY_VIO   0x06
#define	IPMI_SDR_SENSOR_TYPE_PROCESSOR   0x07
#define	IPMI_SDR_SENSOR_TYPE_POWER_SUPPLY   0x08
#define	IPMI_SDR_SENSOR_TYPE_POWER_UNIT   0x09
#define	IPMI_SDR_SENSOR_TYPE_OTHER_UNIT_BASE   0x0B
#define	IPMI_SDR_SENSOR_TYPE_MEMORY   0x0C
#define	IPMI_SDR_SENSOR_TYPE_SYS_FW   0x0F
#define	IPMI_SDR_SENSOR_TYPE_EVENT_LOG   0x10
#define	IPMI_SDR_SENSOR_TYPE_SYS_EVENT   0x12
#define	IPMI_SDR_SENSOR_TYPE_CRITICAL_INT   0x13
#define	IPMI_SDR_SENSOR_TYPE_BUTTON   0x14
#define	IPMI_SDR_SENSOR_TYPE_BOOT_ERR   0x1E
#define	IPMI_SDR_SENSOR_TYPE_WATCHDOG2   0x23
#define	IPMI_SDR_SENSOR_TYPE_MANGE_HEALTH   0x28
#define	IPMI_SDR_SENSOR_TYPE_OEM   0xC0
#define	IPMI_SDR_STRING_TYPE_BCD   0x40
#define	IPMI_SDR_STRING_TYPE_ASCII_6   0x80
#define	IPMI_SDR_STRING_TYPE_ASCII_8   0xC0
#define	IPMI_SENSOR_UNIT_UNSPECIFIED   0x00
#define	IPMI_SENSOR_UNIT_DEGREE_C   0x01
#define	IPMI_SENSOR_UNIT_DEGREE_F   0x02
#define	IPMI_SENSOR_UNIT_DEGREE_K   0x03
#define	IPMI_SENSOR_UNIT_VOL   0x04
#define	IPMI_SENSOR_UNIT_AMP   0x05
#define	IPMI_SENSOR_UNIT_WATT   0x06
#define	IPMI_SENSOR_UNIT_RPM   0x12
#define	IPMI_SDR_SENSOR_INIT_SETTABLE   0x80 /* bit 7 */
#define	IPMI_SDR_SENSOR_INIT_SCAN   0x40 /* bit 6 */
#define	IPMI_SDR_SENSOR_INIT_EVENT   0x20 /* bit 5 */
#define	IPMI_SDR_SENSOR_INIT_THRESHOLD   0x10 /* bit 4 */
#define	IPMI_SDR_SENSOR_INIT_HYSTERESIS   0x08 /* bit 3 */
#define	IPMI_SDR_SENSOR_INIT_TYPE   0x04 /* bit 2 */
#define	IPMI_SDR_SENSOR_INIT_DEF_EVENT   0x02 /* bit 1 */
#define	IPMI_SDR_SENSOR_INIT_DEF_SCAN   0x01 /* bit 0 */
#define	IPMI_SDR_SENSOR_CAP_IGNORE   0x80 /* bit 7 */
#define	IPMI_SDR_SENSOR_CAP_AUTO_RE_ARM   0x40 /* bit 6 */
#define	IPMI_SDR_SENSOR_CAP_MANUAL_REARM   0x00 /* bit 6 */
#define	IPMI_SDR_SENSOR_CAP_HYSTERESIS_NO   0x00 /* bits[5:4], 00 */
#define	IPMI_SDR_SENSOR_CAP_HYSTERESIS_RO   0x10 /* bits[5:4], 01 */
#define	IPMI_SDR_SENSOR_CAP_HYSTERESIS_RW   0x20 /* bits[5:4], 10 */
#define	IPMI_SDR_SENSOR_CAP_HYSTERESIS_FIX   0x30 /* bits[5:4], 11 */
#define	IPMI_SDR_SENSOR_CAP_THRESHOLD_NO   0x00 /* bits[3:2], 00 */
#define	IPMI_SDR_SENSOR_CAP_THRESHOLD_RO   0x04 /* bits[3:2], 01 */
#define	IPMI_SDR_SENSOR_CAP_THRESHOLD_RW   0x08 /* bits[3:2], 10 */
#define	IPMI_SDR_SENSOR_CAP_THRESHOLD_FIX   0x0C /* bits[3:2], 11 */
#define	IPMI_SDR_SENSOR_CAP_EVENT_CTRL_BIT   0x00 /* bits[1:0], 00 */
#define	IPMI_SDR_SENSOR_CAP_EVENT_CTRL_ENTIRE   0x01 /* bits[1:0], 01 */
#define	IPMI_SDR_SENSOR_CAP_EVENT_CTRL_GLOBAL   0x02 /* bits[1:0], 10 */
#define	IPMI_SDR_SENSOR_CAP_EVENT_CTRL_NO   0x03 /* bits[1:0], 11 */
#define	IPMI_SDR_EVENT_TYPE_THRESHOLD   0x01
#define	IPMI_SDR_EVENT_TYPE_USAGE   0x02
#define	IPMI_SDR_EVENT_TYPE_DEAS_ASSE   0x03
#define	IPMI_SDR_EVENT_TYPE_LIMIT_EXCEED   0x05
#define	IPMI_SDR_EVENT_TYPE_PERFORMANCE   0x06
#define	IPMI_SDR_EVENT_TYPE_SEVERITY   0x07
#define	IPMI_SDR_EVENT_TYPE_PRESENT   0x08
#define	IPMI_SDR_EVENT_TYPE_EN_DIS   0x09
#define	IPMI_SDR_EVENT_TYPE_DIS_REDUNDANCY   0x0B
#define	IPMI_SDR_EVENT_TYPE_SENSOR_SPEC   0x6F
#define	IPMI_SDR_ASSERT_MASK_LNCT_LO   0x01 /* bit 0 */
#define	IPMI_SDR_ASSERT_MASK_LNCT_HI   0x02 /* bit 1 */
#define	IPMI_SDR_ASSERT_MASK_LCT_LO   0x04 /* bit 2 */
#define	IPMI_SDR_ASSERT_MASK_LCT_HI   0x08 /* bit 3 */
#define	IPMI_SDR_ASSERT_MASK_LNRT_LO   0x10 /* bit 4 */
#define	IPMI_SDR_ASSERT_MASK_LNRT_HI   0x20 /* bit 5 */
#define	IPMI_SDR_ASSERT_MASK_UNCT_LO   0x40 /* bit 6 */
#define	IPMI_SDR_ASSERT_MASK_UNCT_HI   0x80 /* bit 7 */
#define	IPMI_SDR_ASSERT_MASK_UCT_LO   0x01 /* bit 8 */
#define	IPMI_SDR_ASSERT_MASK_UCT_HI   0x02 /* bit 9 */
#define	IPMI_SDR_ASSERT_MASK_UNRT_LO   0x04 /* bit 10 */
#define	IPMI_SDR_ASSERT_MASK_UNRT_HI   0x08 /* bit 11 */
#define	IPMI_SDR_CMP_RETURN_LNCT   0x10 /* bit 12 */
#define	IPMI_SDR_CMP_RETURN_LCT   0x20 /* bit 13 */
#define	IPMI_SDR_CMP_RETURN_LNRT   0x40 /* bit 14 */
#define	IPMI_SDR_DEASSERT_MASK_LNCT_LO   0x01 /* bit 0 */
#define	IPMI_SDR_DEASSERT_MASK_LNCT_HI   0x02 /* bit 1 */
#define	IPMI_SDR_DEASSERT_MASK_LCT_LO   0x04 /* bit 2 */
#define	IPMI_SDR_DEASSERT_MASK_LCT_HI   0x08 /* bit 3 */
#define	IPMI_SDR_DEASSERT_MASK_LNRT_LO   0x10 /* bit 4 */
#define	IPMI_SDR_DEASSERT_MASK_LNRT_HI   0x20 /* bit 5 */
#define	IPMI_SDR_DEASSERT_MASK_UNCT_LO   0x40 /* bit 6 */
#define	IPMI_SDR_DEASSERT_MASK_UNCT_HI   0x80 /* bit 7 */
#define	IPMI_SDR_DEASSERT_MASK_UCT_LO   0x01 /* bit 8 */
#define	IPMI_SDR_DEASSERT_MASK_UCT_HI   0x02 /* bit 9 */
#define	IPMI_SDR_DEASSERT_MASK_UNRT_LO   0x04 /* bit 10 */
#define	IPMI_SDR_DEASSERT_MASK_UNRT_HI   0x08 /* bit 11 */
#define	IPMI_SDR_CMP_RETURN_UNCT   0x10 /* bit 12 */
#define	IPMI_SDR_CMP_RETURN_UCT   0x20 /* bit 13 */
#define	IPMI_SDR_CMP_RETURN_UNRT   0x40 /* bit 14 */
#define	IPMI_SDR_LNCT_READABLE   0x01 /* bit 0 */
#define	IPMI_SDR_LCT_READABLE   0x02 /* bit 1 */
#define	IPMI_SDR_LNRT_READABLE   0x04 /* bit 2 */
#define	IPMI_SDR_UNCT_READABLE   0x08 /* bit 3 */
#define	IPMI_SDR_UCT_READABLE   0x10 /* bit 4 */
#define	IPMI_SDR_UNRT_READABLE   0x20 /* bit 5 */
#define	IPMI_SDR_LNCT_SETTABLE   0x01 /* bit 8 */
#define	IPMI_SDR_LCT_SETTABLE   0x02 /* bit 9 */
#define	IPMI_SDR_LNRT_SETTABLE   0x04 /* bit 10 */
#define	IPMI_SDR_UNCT_SETTABLE   0x08 /* bit 11 */
#define	IPMI_SDR_UCT_SETTABLE   0x10 /* bit 12 */
#define	IPMI_SDR_UNRT_SETTABLE   0x20 /* bit 13 */
#define	IPMI_SDR_LINEAR_LINEAR   0x00
#define	IPMI_SDR_LINEAR_LN   0x01
#define	IPMI_SDR_LINEAR_LOG10   0x02
#define	IPMI_SDR_LINEAR_LOG2   0x03
#define	IPMI_SDR_LINEAR_EXP   0x04
#define	IPMI_SDR_LINEAR_EXP10   0x05
#define	IPMI_SDR_LINEAR_EXP2   0x06
#define	IPMI_SDR_LINEAR_1_X   0x07
#define	IPMI_SDR_LINEAR_SQR   0x08
#define	IPMI_SDR_LINEAR_CUBE   0x09
#define	IPMI_SDR_LINEAR_SQRT   0x0A
#define	IPMI_SDR_LINEAR_CUBE_1   0x0B
#define	IPMI_NOR_READING_SPEC   0x01
#define	IPMI_NOR_MAX_SPEC   0x02
#define	IPMI_NOR_MIN_SPEC   0x04
#define	IPMI_SDR_SENSOR_DIREC_NO   0x00
#define	IPMI_SDR_SENSOR_DIREC_IN   0x40
#define	IPMI_SDR_SENSOR_DIREC_OUT   0x80
#define	IPMI_ID_STR_MODIFIER_NUM   0x00
#define	IPMI_ID_STR_MODIFIER_ALPHA   0x10
#define	IPMI_ENTIFY_INSTANCE_SHARE_SAME   0x00
#define	IPMI_ENTIFY_INSTANCE_SHARE_INC   0x80
#define	IPMI_SDR_EVENT_TYPE_ABS_PRES_ABSENT   0x01
#define	IPMI_SDR_EVENT_TYPE_ABS_PRES_PRESENT   0x02
#define	IPMI_SDR_EVENT_TYPE_STATE_DEASSERT   0x01
#define	IPMI_SDR_EVENT_TYPE_STATE_ASSERT   0x02
#define	IPMI_SDR_EVENT_TYPE_FULL_REDUNDANCY   0x01
#define	IPMI_SDR_EVENT_TYPE_REDUNDANCY_LOST   0x02
#define	IPMI_SDR_EVENT_TYPE_EN_DIS_DISABLE   0x01
#define	IPMI_SDR_EVENT_TYPE_EN_DIS_ENABLE   0x02
#define	IPMI_SDR_SENSOR_SPEC_EVENT_PROCESSOR_IERR   0x01 /* bit 0 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_PROCESSOR_THERMAL_TRIP   0x02 /* bit 1 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_PROCESSOR_FRB1   0x04 /* bit 2 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_PROCESSOR_FRB2   0x08 /* bit 3 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_PROCESSOR_FRB3   0x10 /* bit 4 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_PROCESSOR_PRESENCE   0x80 /* bit 7 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_PROCESSOR_MCERR   0x08 /* bit 11 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_MEMORY_CORRECT_ECC   0x01 /* bit 0 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_MEMORY_UNCORRECT_ECC   0x02 /* bit 1 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_MEMORY_PARITY   0x04 /* bit 2 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_MEMORY_ECC_LOG_LIMIT_REACH   0x20 /* bit 6*/
#define	IPMI_SDR_EVENT_POWER_SUPPLY_PRESENCE   0x01 /* bit 0 */
#define	IPMI_SDR_EVENT_POWER_SUPPLY_FAILURE   0x02 /* bit 1 */
#define	IPMI_SDR_EVENT_POWER_SUPPLY_PRE_FAILURE   0x04 /* bit 2 */
#define	IPMI_SDR_EVENT_POWER_SUPPLY_INPUT_LOST   0x08 /* bit 3 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_POWER_UNIT_POWER_OFF   0x01 /* bit 0 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_POWER_UNIT_POWER_CYCLE   0x02 /* bit 1 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_POWER_UNIT_AC_LOST   0x10 /* bit 4 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_CRITICAL_INT_FP_NMI   0x01 /* bit 0 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_CRITICAL_INT_SW_NMI   0x08 /* bit 3 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_CRITICAL_INT_PERR   0x10 /* bit 4 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_CRITICAL_INT_SERR   0x20 /* bit 5 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_CRITICAL_INT_NCERR   0x80 /* bit 7 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_CRITICAL_INT_NFERR   0x01 /* bit 8 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_CRITICAL_INT_FATAL_NMI   0x02 /* bit 9 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_CRITICAL_INT_FERR   0x04 /* bit 10 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_BTN_POWER   0x01 /* bit 0 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_BTN_SELLP   0x02 /* bit 1 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_BTN_RESET   0x04 /* bit 2 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_WDT2_EXPIRE   0x01 /* bit 0 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_WDT2_RESET   0x02 /* bit 1 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_WDT2_DOWN   0x04 /* bit 2 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_WDT2_CYCLE   0x08 /* bit 3 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_WDT2_INT   0x01 /* bit 8 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_BOOT_ERR_NO_MEDIA   0x01 /* bit 0 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_BOOT_ERR_NON_BOOTABLE   0x02 /* bit 1 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_BOOT_ERR_PXE_NO   0x04 /* bit 2 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_BOOT_ERR_INVALID_SECTOR   0x08 /* bit 3 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_BOOT_ERR_TIMEOUT   0x10 /* bit 4 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_SYS_FW_POST_ERR   0x01 /* bit 0 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_SYS_FW_HANG   0x02 /* bit 1 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_SYS_FW_PROGRESS   0x04 /* bit 2 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_LOG_MEM_ERR_DIS   0x01 /* bit 0 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_LOG_TYPE_DIS   0x02 /* bit 1 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_LOG_CLEAR   0x04 /* bit 2 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_LOG_ALL_DIS   0x08 /* bit 3 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_LOG_SEL_FULL   0x10 /* bit 4 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_LOG_SEL_ALMOST_FULL   0x20 /* bit 5 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_SYS_EVENT_RECONFIG   0x01 /* bit 0 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_SYS_EVENT_OEM   0x02 /* bit 1 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_SYS_EVENT_HW_FAIL   0x04 /* bit 2 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_SYS_EVENT_ADD_AUXI   0x08 /* bit 3 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_SYS_EVENT_PEF   0x10 /* bit 4 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_SYS_EVENT_CLOCK   0x20 /* bit 5 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_PHYSICAL_SECURITY_CHASSIS   0x01 /* bit 0 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_MANAGEMENT_UNAVAILABLE   0x08 /* bit 3 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_CPU_HOT   0x01 /* bit 0 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_DIMM_HOT   0x02 /* bit 1 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_CPU_VR_HOT   0x01 /* bit 0 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_DIMM_AB_VR_HOT   0x02 /* bit 1 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_DIMM_DE_VR_HOT   0x04 /* bit 2 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_SYS_THERMAL_TRIP   0x01 /* bit 0 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_SYS_FIVR_FAULT   0x02 /* bit 1 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_SYS_THROTTLE   0x04 /* bit 2 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_SYS_PCHHOT   0x08 /* bit 3 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_FM_THROT   0x10 /* bit 4 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_FAST_THROT   0x20 /* bit 5 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_PMBUS_ALERT   0x40 /* bit 6 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_SLP_S4   0x01 /* bit 0 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_SLP_S3   0x02 /* bit 1 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_PCH_PWROK   0x04 /* bit 2 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_SYS_PWROK   0x08 /* bit 3 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_PLTRST   0x10 /* bit 4 */
#define	IPMI_SDR_SENSOR_SPEC_EVENT_POST_CLT   0x20 /* bit 5 */
#define	SDR_END_ID   0xFFFF
#define	SDR_INVALID_ID   0xFFFE
#define	MAX_SDR_SENSOR_NAME_LEN   32
#define	SDR_M(sensor_num)
#define	SDR_R(sensor_num)   ((full_sdr_table[sdr_index_map[sensor_num]].RexpBexp >> 4) & 0x0F)
#define	SDR_Rexp(sensor_num)   negative_ten_power[SDR_R(sensor_num)]

Typedefs
typedef struct _SDR_Full_sensor_	SDR_Full_sensor
typedef struct _SDR_INFO_	SDR_INFO

Enumerations
enum	rsv_table_index { RSV_TABLE_INDEX_0 = 0 , RSV_TABLE_INDEX_1 }
enum	{   THRESHOLD_UNR , THRESHOLD_UCR , THRESHOLD_UNC , THRESHOLD_LNR ,   THRESHOLD_LCR , THRESHOLD_LNC , MBR_M , MBR_B ,   MBR_R }

Functions
uint16_t	SDR_get_record_ID (uint16_t current_ID)
bool	SDR_check_record_ID (uint16_t current_ID)
uint16_t	SDR_get_RSV_ID (uint8_t rsv_table_index)
bool	SDR_RSV_ID_check (uint16_t ID, uint8_t rsv_table_index)
uint8_t	sdr_init (void)
void	pal_fix_full_sdr_table (void)
bool	check_sdr_num_exist (uint8_t sensor_num)
void	add_full_sdr_table (SDR_Full_sensor add_item)
void	change_sensor_threshold (uint8_t sensor_num, uint8_t threshold_type, uint8_t change_value)
void	change_sensor_mbr (uint8_t sensor_num, uint8_t mbr_type, uint16_t change_value)
uint8_t	plat_get_sdr_size ()
void	load_sdr_table (void)

Variables
uint8_t	sdr_count
bool	is_sdr_not_init
uint8_t	sdr_index_map []
SDR_Full_sensor *	full_sdr_table
uint8_t	sensor_config_size
const int	negative_ten_power [16]

Macro Definition Documentation

IPMI_ENTIFY_INSTANCE_SHARE_INC

#define IPMI_ENTIFY_INSTANCE_SHARE_INC   0x80

IPMI_ENTIFY_INSTANCE_SHARE_SAME

#define IPMI_ENTIFY_INSTANCE_SHARE_SAME   0x00

IPMI_ID_STR_MODIFIER_ALPHA

#define IPMI_ID_STR_MODIFIER_ALPHA   0x10

IPMI_ID_STR_MODIFIER_NUM

#define IPMI_ID_STR_MODIFIER_NUM   0x00

IPMI_NOR_MAX_SPEC

#define IPMI_NOR_MAX_SPEC   0x02

IPMI_NOR_MIN_SPEC

#define IPMI_NOR_MIN_SPEC   0x04

IPMI_NOR_READING_SPEC

#define IPMI_NOR_READING_SPEC   0x01

IPMI_SDR_ASSERT_MASK_LCT_HI

#define IPMI_SDR_ASSERT_MASK_LCT_HI   0x08 /* bit 3 */

IPMI_SDR_ASSERT_MASK_LCT_LO

#define IPMI_SDR_ASSERT_MASK_LCT_LO   0x04 /* bit 2 */

IPMI_SDR_ASSERT_MASK_LNCT_HI

#define IPMI_SDR_ASSERT_MASK_LNCT_HI   0x02 /* bit 1 */

IPMI_SDR_ASSERT_MASK_LNCT_LO

#define IPMI_SDR_ASSERT_MASK_LNCT_LO   0x01 /* bit 0 */

IPMI_SDR_ASSERT_MASK_LNRT_HI

#define IPMI_SDR_ASSERT_MASK_LNRT_HI   0x20 /* bit 5 */

IPMI_SDR_ASSERT_MASK_LNRT_LO

#define IPMI_SDR_ASSERT_MASK_LNRT_LO   0x10 /* bit 4 */

IPMI_SDR_ASSERT_MASK_UCT_HI

#define IPMI_SDR_ASSERT_MASK_UCT_HI   0x02 /* bit 9 */

IPMI_SDR_ASSERT_MASK_UCT_LO

#define IPMI_SDR_ASSERT_MASK_UCT_LO   0x01 /* bit 8 */

IPMI_SDR_ASSERT_MASK_UNCT_HI

#define IPMI_SDR_ASSERT_MASK_UNCT_HI   0x80 /* bit 7 */

IPMI_SDR_ASSERT_MASK_UNCT_LO

#define IPMI_SDR_ASSERT_MASK_UNCT_LO   0x40 /* bit 6 */

IPMI_SDR_ASSERT_MASK_UNRT_HI

#define IPMI_SDR_ASSERT_MASK_UNRT_HI   0x08 /* bit 11 */

IPMI_SDR_ASSERT_MASK_UNRT_LO

#define IPMI_SDR_ASSERT_MASK_UNRT_LO   0x04 /* bit 10 */

IPMI_SDR_CMP_RETURN_LCT

#define IPMI_SDR_CMP_RETURN_LCT   0x20 /* bit 13 */

IPMI_SDR_CMP_RETURN_LNCT

#define IPMI_SDR_CMP_RETURN_LNCT   0x10 /* bit 12 */

IPMI_SDR_CMP_RETURN_LNRT

#define IPMI_SDR_CMP_RETURN_LNRT   0x40 /* bit 14 */

IPMI_SDR_CMP_RETURN_UCT

#define IPMI_SDR_CMP_RETURN_UCT   0x20 /* bit 13 */

IPMI_SDR_CMP_RETURN_UNCT

#define IPMI_SDR_CMP_RETURN_UNCT   0x10 /* bit 12 */

IPMI_SDR_CMP_RETURN_UNRT

#define IPMI_SDR_CMP_RETURN_UNRT   0x40 /* bit 14 */

IPMI_SDR_COMPACT_SENSOR

#define IPMI_SDR_COMPACT_SENSOR   0x02

IPMI_SDR_COMPACT_SENSOR_MIN_LEN

#define IPMI_SDR_COMPACT_SENSOR_MIN_LEN   27

IPMI_SDR_DEASSERT_MASK_LCT_HI

#define IPMI_SDR_DEASSERT_MASK_LCT_HI   0x08 /* bit 3 */

IPMI_SDR_DEASSERT_MASK_LCT_LO

#define IPMI_SDR_DEASSERT_MASK_LCT_LO   0x04 /* bit 2 */

IPMI_SDR_DEASSERT_MASK_LNCT_HI

#define IPMI_SDR_DEASSERT_MASK_LNCT_HI   0x02 /* bit 1 */

IPMI_SDR_DEASSERT_MASK_LNCT_LO

#define IPMI_SDR_DEASSERT_MASK_LNCT_LO   0x01 /* bit 0 */

IPMI_SDR_DEASSERT_MASK_LNRT_HI

#define IPMI_SDR_DEASSERT_MASK_LNRT_HI   0x20 /* bit 5 */

IPMI_SDR_DEASSERT_MASK_LNRT_LO

#define IPMI_SDR_DEASSERT_MASK_LNRT_LO   0x10 /* bit 4 */

IPMI_SDR_DEASSERT_MASK_UCT_HI

#define IPMI_SDR_DEASSERT_MASK_UCT_HI   0x02 /* bit 9 */

IPMI_SDR_DEASSERT_MASK_UCT_LO

#define IPMI_SDR_DEASSERT_MASK_UCT_LO   0x01 /* bit 8 */

IPMI_SDR_DEASSERT_MASK_UNCT_HI

#define IPMI_SDR_DEASSERT_MASK_UNCT_HI   0x80 /* bit 7 */

IPMI_SDR_DEASSERT_MASK_UNCT_LO

#define IPMI_SDR_DEASSERT_MASK_UNCT_LO   0x40 /* bit 6 */

IPMI_SDR_DEASSERT_MASK_UNRT_HI

#define IPMI_SDR_DEASSERT_MASK_UNRT_HI   0x08 /* bit 11 */

IPMI_SDR_DEASSERT_MASK_UNRT_LO

#define IPMI_SDR_DEASSERT_MASK_UNRT_LO   0x04 /* bit 10 */

IPMI_SDR_ENTITY_ID_ADDIN_CARD

#define IPMI_SDR_ENTITY_ID_ADDIN_CARD   0x0B

IPMI_SDR_ENTITY_ID_AIR_INLET

#define IPMI_SDR_ENTITY_ID_AIR_INLET   0x37

IPMI_SDR_ENTITY_ID_BACK_PANEL

#define IPMI_SDR_ENTITY_ID_BACK_PANEL   0x0D

IPMI_SDR_ENTITY_ID_BACKPLANE

#define IPMI_SDR_ENTITY_ID_BACKPLANE   0x0F

IPMI_SDR_ENTITY_ID_BATTERY

#define IPMI_SDR_ENTITY_ID_BATTERY   0x28

IPMI_SDR_ENTITY_ID_CHASSIS_BACK_PANEL_BOARD

#define IPMI_SDR_ENTITY_ID_CHASSIS_BACK_PANEL_BOARD   0x16

IPMI_SDR_ENTITY_ID_DISK

#define IPMI_SDR_ENTITY_ID_DISK   0x04

IPMI_SDR_ENTITY_ID_FAN_DEVICE

#define IPMI_SDR_ENTITY_ID_FAN_DEVICE   0x1D

IPMI_SDR_ENTITY_ID_FRONT_PANEL

#define IPMI_SDR_ENTITY_ID_FRONT_PANEL   0x0C

IPMI_SDR_ENTITY_ID_FSB

#define IPMI_SDR_ENTITY_ID_FSB   0x34

IPMI_SDR_ENTITY_ID_INTERNAL_EXPANSION_BOARD

#define IPMI_SDR_ENTITY_ID_INTERNAL_EXPANSION_BOARD   0x10

IPMI_SDR_ENTITY_ID_IO_MODULE

#define IPMI_SDR_ENTITY_ID_IO_MODULE   0x2C

IPMI_SDR_ENTITY_ID_MC_FW

#define IPMI_SDR_ENTITY_ID_MC_FW   0x2E

IPMI_SDR_ENTITY_ID_MEM_MODULE

#define IPMI_SDR_ENTITY_ID_MEM_MODULE   0x08

IPMI_SDR_ENTITY_ID_MEMORY

#define IPMI_SDR_ENTITY_ID_MEMORY   0x20

IPMI_SDR_ENTITY_ID_OS

#define IPMI_SDR_ENTITY_ID_OS   0x23

IPMI_SDR_ENTITY_ID_OTHER

#define IPMI_SDR_ENTITY_ID_OTHER   0x01

IPMI_SDR_ENTITY_ID_OTHER_SYSTEM_BOARD

#define IPMI_SDR_ENTITY_ID_OTHER_SYSTEM_BOARD   0x11

IPMI_SDR_ENTITY_ID_PCI_BUS

#define IPMI_SDR_ENTITY_ID_PCI_BUS   0x30

IPMI_SDR_ENTITY_ID_PCIE_BUS

#define IPMI_SDR_ENTITY_ID_PCIE_BUS   0x31

IPMI_SDR_ENTITY_ID_PDB

#define IPMI_SDR_ENTITY_ID_PDB   0x15

IPMI_SDR_ENTITY_ID_POWER_MODULE

#define IPMI_SDR_ENTITY_ID_POWER_MODULE   0x14

IPMI_SDR_ENTITY_ID_POWER_SUPPLY

#define IPMI_SDR_ENTITY_ID_POWER_SUPPLY   0x0A

IPMI_SDR_ENTITY_ID_POWER_SYSTEM_BOARD

#define IPMI_SDR_ENTITY_ID_POWER_SYSTEM_BOARD   0x0E

IPMI_SDR_ENTITY_ID_POWER_UNIT

#define IPMI_SDR_ENTITY_ID_POWER_UNIT   0x13

IPMI_SDR_ENTITY_ID_PROCESSOR

#define IPMI_SDR_ENTITY_ID_PROCESSOR   0x03

IPMI_SDR_ENTITY_ID_PROCESSOR_BOARD

#define IPMI_SDR_ENTITY_ID_PROCESSOR_BOARD   0x12

IPMI_SDR_ENTITY_ID_PROCESSOR_DCMI

#define IPMI_SDR_ENTITY_ID_PROCESSOR_DCMI   0x41

IPMI_SDR_ENTITY_ID_PROCESSOR_IO

#define IPMI_SDR_ENTITY_ID_PROCESSOR_IO   0x2D

IPMI_SDR_ENTITY_ID_SATA_BUS

#define IPMI_SDR_ENTITY_ID_SATA_BUS   0x33

IPMI_SDR_ENTITY_ID_SCSI_BUS

#define IPMI_SDR_ENTITY_ID_SCSI_BUS   0x32

IPMI_SDR_ENTITY_ID_SYS_BOARD

#define IPMI_SDR_ENTITY_ID_SYS_BOARD   0x07

IPMI_SDR_ENTITY_ID_SYS_BOARD_DCMI

#define IPMI_SDR_ENTITY_ID_SYS_BOARD_DCMI   0x42

IPMI_SDR_ENTITY_ID_SYS_BUS

#define IPMI_SDR_ENTITY_ID_SYS_BUS   0x24

IPMI_SDR_ENTITY_ID_SYS_CHASSIS

#define IPMI_SDR_ENTITY_ID_SYS_CHASSIS   0x17

IPMI_SDR_ENTITY_ID_SYS_FW

#define IPMI_SDR_ENTITY_ID_SYS_FW   0x22

IPMI_SDR_ENTITY_ID_SYS_MGT_MOD

#define IPMI_SDR_ENTITY_ID_SYS_MGT_MOD   0x06

IPMI_SDR_ENTITY_ID_UNKNOWN

#define IPMI_SDR_ENTITY_ID_UNKNOWN   0x02

IPMI_SDR_EVENT_ONLY

#define IPMI_SDR_EVENT_ONLY   0x03

IPMI_SDR_EVENT_POWER_SUPPLY_FAILURE

#define IPMI_SDR_EVENT_POWER_SUPPLY_FAILURE   0x02 /* bit 1 */

IPMI_SDR_EVENT_POWER_SUPPLY_INPUT_LOST

#define IPMI_SDR_EVENT_POWER_SUPPLY_INPUT_LOST   0x08 /* bit 3 */

IPMI_SDR_EVENT_POWER_SUPPLY_PRE_FAILURE

#define IPMI_SDR_EVENT_POWER_SUPPLY_PRE_FAILURE   0x04 /* bit 2 */

IPMI_SDR_EVENT_POWER_SUPPLY_PRESENCE

#define IPMI_SDR_EVENT_POWER_SUPPLY_PRESENCE   0x01 /* bit 0 */

IPMI_SDR_EVENT_SENSOR_MIN_LEN

#define IPMI_SDR_EVENT_SENSOR_MIN_LEN   12

IPMI_SDR_EVENT_TYPE_ABS_PRES_ABSENT

#define IPMI_SDR_EVENT_TYPE_ABS_PRES_ABSENT   0x01

IPMI_SDR_EVENT_TYPE_ABS_PRES_PRESENT

#define IPMI_SDR_EVENT_TYPE_ABS_PRES_PRESENT   0x02

IPMI_SDR_EVENT_TYPE_DEAS_ASSE

#define IPMI_SDR_EVENT_TYPE_DEAS_ASSE   0x03

IPMI_SDR_EVENT_TYPE_DIS_REDUNDANCY

#define IPMI_SDR_EVENT_TYPE_DIS_REDUNDANCY   0x0B

IPMI_SDR_EVENT_TYPE_EN_DIS

#define IPMI_SDR_EVENT_TYPE_EN_DIS   0x09

IPMI_SDR_EVENT_TYPE_EN_DIS_DISABLE

#define IPMI_SDR_EVENT_TYPE_EN_DIS_DISABLE   0x01

IPMI_SDR_EVENT_TYPE_EN_DIS_ENABLE

#define IPMI_SDR_EVENT_TYPE_EN_DIS_ENABLE   0x02

IPMI_SDR_EVENT_TYPE_FULL_REDUNDANCY

#define IPMI_SDR_EVENT_TYPE_FULL_REDUNDANCY   0x01

IPMI_SDR_EVENT_TYPE_LIMIT_EXCEED

#define IPMI_SDR_EVENT_TYPE_LIMIT_EXCEED   0x05

IPMI_SDR_EVENT_TYPE_PERFORMANCE

#define IPMI_SDR_EVENT_TYPE_PERFORMANCE   0x06

IPMI_SDR_EVENT_TYPE_PRESENT

#define IPMI_SDR_EVENT_TYPE_PRESENT   0x08

IPMI_SDR_EVENT_TYPE_REDUNDANCY_LOST

#define IPMI_SDR_EVENT_TYPE_REDUNDANCY_LOST   0x02

IPMI_SDR_EVENT_TYPE_SENSOR_SPEC

#define IPMI_SDR_EVENT_TYPE_SENSOR_SPEC   0x6F

IPMI_SDR_EVENT_TYPE_SEVERITY

#define IPMI_SDR_EVENT_TYPE_SEVERITY   0x07

IPMI_SDR_EVENT_TYPE_STATE_ASSERT

#define IPMI_SDR_EVENT_TYPE_STATE_ASSERT   0x02

IPMI_SDR_EVENT_TYPE_STATE_DEASSERT

#define IPMI_SDR_EVENT_TYPE_STATE_DEASSERT   0x01

IPMI_SDR_EVENT_TYPE_THRESHOLD

#define IPMI_SDR_EVENT_TYPE_THRESHOLD   0x01

IPMI_SDR_EVENT_TYPE_USAGE

#define IPMI_SDR_EVENT_TYPE_USAGE   0x02

IPMI_SDR_FRU_SENSOR_MIN_LEN

#define IPMI_SDR_FRU_SENSOR_MIN_LEN   11

IPMI_SDR_FULL_SENSOR

#define IPMI_SDR_FULL_SENSOR   0x01

IPMI_SDR_FULL_SENSOR_MIN_LEN

#define IPMI_SDR_FULL_SENSOR_MIN_LEN   43

IPMI_SDR_HEADER_LEN

#define IPMI_SDR_HEADER_LEN   5

IPMI_SDR_LCT_READABLE

#define IPMI_SDR_LCT_READABLE   0x02 /* bit 1 */

IPMI_SDR_LCT_SETTABLE

#define IPMI_SDR_LCT_SETTABLE   0x02 /* bit 9 */

IPMI_SDR_LINEAR_1_X

#define IPMI_SDR_LINEAR_1_X   0x07

IPMI_SDR_LINEAR_CUBE

#define IPMI_SDR_LINEAR_CUBE   0x09

IPMI_SDR_LINEAR_CUBE_1

#define IPMI_SDR_LINEAR_CUBE_1   0x0B

IPMI_SDR_LINEAR_EXP

#define IPMI_SDR_LINEAR_EXP   0x04

IPMI_SDR_LINEAR_EXP10

#define IPMI_SDR_LINEAR_EXP10   0x05

IPMI_SDR_LINEAR_EXP2

#define IPMI_SDR_LINEAR_EXP2   0x06

IPMI_SDR_LINEAR_LINEAR

#define IPMI_SDR_LINEAR_LINEAR   0x00

IPMI_SDR_LINEAR_LN

#define IPMI_SDR_LINEAR_LN   0x01

IPMI_SDR_LINEAR_LOG10

#define IPMI_SDR_LINEAR_LOG10   0x02

IPMI_SDR_LINEAR_LOG2

#define IPMI_SDR_LINEAR_LOG2   0x03

IPMI_SDR_LINEAR_SQR

#define IPMI_SDR_LINEAR_SQR   0x08

IPMI_SDR_LINEAR_SQRT

#define IPMI_SDR_LINEAR_SQRT   0x0A

IPMI_SDR_LNCT_READABLE

#define IPMI_SDR_LNCT_READABLE   0x01 /* bit 0 */

IPMI_SDR_LNCT_SETTABLE

#define IPMI_SDR_LNCT_SETTABLE   0x01 /* bit 8 */

IPMI_SDR_LNRT_READABLE

#define IPMI_SDR_LNRT_READABLE   0x04 /* bit 2 */

IPMI_SDR_LNRT_SETTABLE

#define IPMI_SDR_LNRT_SETTABLE   0x04 /* bit 10 */

IPMI_SDR_MC_SENSOR_MIN_LEN

#define IPMI_SDR_MC_SENSOR_MIN_LEN   11

IPMI_SDR_SENSOR_CAP_AUTO_RE_ARM

#define IPMI_SDR_SENSOR_CAP_AUTO_RE_ARM   0x40 /* bit 6 */

IPMI_SDR_SENSOR_CAP_EVENT_CTRL_BIT

#define IPMI_SDR_SENSOR_CAP_EVENT_CTRL_BIT   0x00 /* bits[1:0], 00 */

IPMI_SDR_SENSOR_CAP_EVENT_CTRL_ENTIRE

#define IPMI_SDR_SENSOR_CAP_EVENT_CTRL_ENTIRE   0x01 /* bits[1:0], 01 */

IPMI_SDR_SENSOR_CAP_EVENT_CTRL_GLOBAL

#define IPMI_SDR_SENSOR_CAP_EVENT_CTRL_GLOBAL   0x02 /* bits[1:0], 10 */

IPMI_SDR_SENSOR_CAP_EVENT_CTRL_NO

#define IPMI_SDR_SENSOR_CAP_EVENT_CTRL_NO   0x03 /* bits[1:0], 11 */

IPMI_SDR_SENSOR_CAP_HYSTERESIS_FIX

#define IPMI_SDR_SENSOR_CAP_HYSTERESIS_FIX   0x30 /* bits[5:4], 11 */

IPMI_SDR_SENSOR_CAP_HYSTERESIS_NO

#define IPMI_SDR_SENSOR_CAP_HYSTERESIS_NO   0x00 /* bits[5:4], 00 */

IPMI_SDR_SENSOR_CAP_HYSTERESIS_RO

#define IPMI_SDR_SENSOR_CAP_HYSTERESIS_RO   0x10 /* bits[5:4], 01 */

IPMI_SDR_SENSOR_CAP_HYSTERESIS_RW

#define IPMI_SDR_SENSOR_CAP_HYSTERESIS_RW   0x20 /* bits[5:4], 10 */

IPMI_SDR_SENSOR_CAP_IGNORE

#define IPMI_SDR_SENSOR_CAP_IGNORE   0x80 /* bit 7 */

IPMI_SDR_SENSOR_CAP_MANUAL_REARM

#define IPMI_SDR_SENSOR_CAP_MANUAL_REARM   0x00 /* bit 6 */

IPMI_SDR_SENSOR_CAP_THRESHOLD_FIX

#define IPMI_SDR_SENSOR_CAP_THRESHOLD_FIX   0x0C /* bits[3:2], 11 */

IPMI_SDR_SENSOR_CAP_THRESHOLD_NO

#define IPMI_SDR_SENSOR_CAP_THRESHOLD_NO   0x00 /* bits[3:2], 00 */

IPMI_SDR_SENSOR_CAP_THRESHOLD_RO

#define IPMI_SDR_SENSOR_CAP_THRESHOLD_RO   0x04 /* bits[3:2], 01 */

IPMI_SDR_SENSOR_CAP_THRESHOLD_RW

#define IPMI_SDR_SENSOR_CAP_THRESHOLD_RW   0x08 /* bits[3:2], 10 */

IPMI_SDR_SENSOR_DIREC_IN

#define IPMI_SDR_SENSOR_DIREC_IN   0x40

IPMI_SDR_SENSOR_DIREC_NO

#define IPMI_SDR_SENSOR_DIREC_NO   0x00

IPMI_SDR_SENSOR_DIREC_OUT

#define IPMI_SDR_SENSOR_DIREC_OUT   0x80

IPMI_SDR_SENSOR_INIT_DEF_EVENT

#define IPMI_SDR_SENSOR_INIT_DEF_EVENT   0x02 /* bit 1 */

IPMI_SDR_SENSOR_INIT_DEF_SCAN

#define IPMI_SDR_SENSOR_INIT_DEF_SCAN   0x01 /* bit 0 */

IPMI_SDR_SENSOR_INIT_EVENT

#define IPMI_SDR_SENSOR_INIT_EVENT   0x20 /* bit 5 */

IPMI_SDR_SENSOR_INIT_HYSTERESIS

#define IPMI_SDR_SENSOR_INIT_HYSTERESIS   0x08 /* bit 3 */

IPMI_SDR_SENSOR_INIT_SCAN

#define IPMI_SDR_SENSOR_INIT_SCAN   0x40 /* bit 6 */

IPMI_SDR_SENSOR_INIT_SETTABLE

#define IPMI_SDR_SENSOR_INIT_SETTABLE   0x80 /* bit 7 */

IPMI_SDR_SENSOR_INIT_THRESHOLD

#define IPMI_SDR_SENSOR_INIT_THRESHOLD   0x10 /* bit 4 */

IPMI_SDR_SENSOR_INIT_TYPE

#define IPMI_SDR_SENSOR_INIT_TYPE   0x04 /* bit 2 */

IPMI_SDR_SENSOR_SPEC_EVENT_BOOT_ERR_INVALID_SECTOR

#define IPMI_SDR_SENSOR_SPEC_EVENT_BOOT_ERR_INVALID_SECTOR   0x08 /* bit 3 */

IPMI_SDR_SENSOR_SPEC_EVENT_BOOT_ERR_NO_MEDIA

#define IPMI_SDR_SENSOR_SPEC_EVENT_BOOT_ERR_NO_MEDIA   0x01 /* bit 0 */

IPMI_SDR_SENSOR_SPEC_EVENT_BOOT_ERR_NON_BOOTABLE

#define IPMI_SDR_SENSOR_SPEC_EVENT_BOOT_ERR_NON_BOOTABLE   0x02 /* bit 1 */

IPMI_SDR_SENSOR_SPEC_EVENT_BOOT_ERR_PXE_NO

#define IPMI_SDR_SENSOR_SPEC_EVENT_BOOT_ERR_PXE_NO   0x04 /* bit 2 */

IPMI_SDR_SENSOR_SPEC_EVENT_BOOT_ERR_TIMEOUT

#define IPMI_SDR_SENSOR_SPEC_EVENT_BOOT_ERR_TIMEOUT   0x10 /* bit 4 */

IPMI_SDR_SENSOR_SPEC_EVENT_BTN_POWER

#define IPMI_SDR_SENSOR_SPEC_EVENT_BTN_POWER   0x01 /* bit 0 */

IPMI_SDR_SENSOR_SPEC_EVENT_BTN_RESET

#define IPMI_SDR_SENSOR_SPEC_EVENT_BTN_RESET   0x04 /* bit 2 */

IPMI_SDR_SENSOR_SPEC_EVENT_BTN_SELLP

#define IPMI_SDR_SENSOR_SPEC_EVENT_BTN_SELLP   0x02 /* bit 1 */

IPMI_SDR_SENSOR_SPEC_EVENT_CPU_HOT

#define IPMI_SDR_SENSOR_SPEC_EVENT_CPU_HOT   0x01 /* bit 0 */

IPMI_SDR_SENSOR_SPEC_EVENT_CPU_VR_HOT

#define IPMI_SDR_SENSOR_SPEC_EVENT_CPU_VR_HOT   0x01 /* bit 0 */

IPMI_SDR_SENSOR_SPEC_EVENT_CRITICAL_INT_FATAL_NMI

#define IPMI_SDR_SENSOR_SPEC_EVENT_CRITICAL_INT_FATAL_NMI   0x02 /* bit 9 */

IPMI_SDR_SENSOR_SPEC_EVENT_CRITICAL_INT_FERR

#define IPMI_SDR_SENSOR_SPEC_EVENT_CRITICAL_INT_FERR   0x04 /* bit 10 */

IPMI_SDR_SENSOR_SPEC_EVENT_CRITICAL_INT_FP_NMI

#define IPMI_SDR_SENSOR_SPEC_EVENT_CRITICAL_INT_FP_NMI   0x01 /* bit 0 */

IPMI_SDR_SENSOR_SPEC_EVENT_CRITICAL_INT_NCERR

#define IPMI_SDR_SENSOR_SPEC_EVENT_CRITICAL_INT_NCERR   0x80 /* bit 7 */

IPMI_SDR_SENSOR_SPEC_EVENT_CRITICAL_INT_NFERR

#define IPMI_SDR_SENSOR_SPEC_EVENT_CRITICAL_INT_NFERR   0x01 /* bit 8 */

IPMI_SDR_SENSOR_SPEC_EVENT_CRITICAL_INT_PERR

#define IPMI_SDR_SENSOR_SPEC_EVENT_CRITICAL_INT_PERR   0x10 /* bit 4 */

IPMI_SDR_SENSOR_SPEC_EVENT_CRITICAL_INT_SERR

#define IPMI_SDR_SENSOR_SPEC_EVENT_CRITICAL_INT_SERR   0x20 /* bit 5 */

IPMI_SDR_SENSOR_SPEC_EVENT_CRITICAL_INT_SW_NMI

#define IPMI_SDR_SENSOR_SPEC_EVENT_CRITICAL_INT_SW_NMI   0x08 /* bit 3 */

IPMI_SDR_SENSOR_SPEC_EVENT_DIMM_AB_VR_HOT

#define IPMI_SDR_SENSOR_SPEC_EVENT_DIMM_AB_VR_HOT   0x02 /* bit 1 */

IPMI_SDR_SENSOR_SPEC_EVENT_DIMM_DE_VR_HOT

#define IPMI_SDR_SENSOR_SPEC_EVENT_DIMM_DE_VR_HOT   0x04 /* bit 2 */

IPMI_SDR_SENSOR_SPEC_EVENT_DIMM_HOT

#define IPMI_SDR_SENSOR_SPEC_EVENT_DIMM_HOT   0x02 /* bit 1 */

IPMI_SDR_SENSOR_SPEC_EVENT_FAST_THROT

#define IPMI_SDR_SENSOR_SPEC_EVENT_FAST_THROT   0x20 /* bit 5 */

IPMI_SDR_SENSOR_SPEC_EVENT_FM_THROT

#define IPMI_SDR_SENSOR_SPEC_EVENT_FM_THROT   0x10 /* bit 4 */

IPMI_SDR_SENSOR_SPEC_EVENT_LOG_ALL_DIS

#define IPMI_SDR_SENSOR_SPEC_EVENT_LOG_ALL_DIS   0x08 /* bit 3 */

IPMI_SDR_SENSOR_SPEC_EVENT_LOG_CLEAR

#define IPMI_SDR_SENSOR_SPEC_EVENT_LOG_CLEAR   0x04 /* bit 2 */

IPMI_SDR_SENSOR_SPEC_EVENT_LOG_MEM_ERR_DIS

#define IPMI_SDR_SENSOR_SPEC_EVENT_LOG_MEM_ERR_DIS   0x01 /* bit 0 */

IPMI_SDR_SENSOR_SPEC_EVENT_LOG_SEL_ALMOST_FULL

#define IPMI_SDR_SENSOR_SPEC_EVENT_LOG_SEL_ALMOST_FULL   0x20 /* bit 5 */

IPMI_SDR_SENSOR_SPEC_EVENT_LOG_SEL_FULL

#define IPMI_SDR_SENSOR_SPEC_EVENT_LOG_SEL_FULL   0x10 /* bit 4 */

IPMI_SDR_SENSOR_SPEC_EVENT_LOG_TYPE_DIS

#define IPMI_SDR_SENSOR_SPEC_EVENT_LOG_TYPE_DIS   0x02 /* bit 1 */

IPMI_SDR_SENSOR_SPEC_EVENT_MANAGEMENT_UNAVAILABLE

#define IPMI_SDR_SENSOR_SPEC_EVENT_MANAGEMENT_UNAVAILABLE   0x08 /* bit 3 */

IPMI_SDR_SENSOR_SPEC_EVENT_MEMORY_CORRECT_ECC

#define IPMI_SDR_SENSOR_SPEC_EVENT_MEMORY_CORRECT_ECC   0x01 /* bit 0 */

IPMI_SDR_SENSOR_SPEC_EVENT_MEMORY_ECC_LOG_LIMIT_REACH

#define IPMI_SDR_SENSOR_SPEC_EVENT_MEMORY_ECC_LOG_LIMIT_REACH   0x20 /* bit 6*/

IPMI_SDR_SENSOR_SPEC_EVENT_MEMORY_PARITY

#define IPMI_SDR_SENSOR_SPEC_EVENT_MEMORY_PARITY   0x04 /* bit 2 */

IPMI_SDR_SENSOR_SPEC_EVENT_MEMORY_UNCORRECT_ECC

#define IPMI_SDR_SENSOR_SPEC_EVENT_MEMORY_UNCORRECT_ECC   0x02 /* bit 1 */

IPMI_SDR_SENSOR_SPEC_EVENT_PCH_PWROK

#define IPMI_SDR_SENSOR_SPEC_EVENT_PCH_PWROK   0x04 /* bit 2 */

IPMI_SDR_SENSOR_SPEC_EVENT_PHYSICAL_SECURITY_CHASSIS

#define IPMI_SDR_SENSOR_SPEC_EVENT_PHYSICAL_SECURITY_CHASSIS   0x01 /* bit 0 */

IPMI_SDR_SENSOR_SPEC_EVENT_PLTRST

#define IPMI_SDR_SENSOR_SPEC_EVENT_PLTRST   0x10 /* bit 4 */

IPMI_SDR_SENSOR_SPEC_EVENT_PMBUS_ALERT

#define IPMI_SDR_SENSOR_SPEC_EVENT_PMBUS_ALERT   0x40 /* bit 6 */

IPMI_SDR_SENSOR_SPEC_EVENT_POST_CLT

#define IPMI_SDR_SENSOR_SPEC_EVENT_POST_CLT   0x20 /* bit 5 */

IPMI_SDR_SENSOR_SPEC_EVENT_POWER_UNIT_AC_LOST

#define IPMI_SDR_SENSOR_SPEC_EVENT_POWER_UNIT_AC_LOST   0x10 /* bit 4 */

IPMI_SDR_SENSOR_SPEC_EVENT_POWER_UNIT_POWER_CYCLE

#define IPMI_SDR_SENSOR_SPEC_EVENT_POWER_UNIT_POWER_CYCLE   0x02 /* bit 1 */

IPMI_SDR_SENSOR_SPEC_EVENT_POWER_UNIT_POWER_OFF

#define IPMI_SDR_SENSOR_SPEC_EVENT_POWER_UNIT_POWER_OFF   0x01 /* bit 0 */

IPMI_SDR_SENSOR_SPEC_EVENT_PROCESSOR_FRB1

#define IPMI_SDR_SENSOR_SPEC_EVENT_PROCESSOR_FRB1   0x04 /* bit 2 */

IPMI_SDR_SENSOR_SPEC_EVENT_PROCESSOR_FRB2

#define IPMI_SDR_SENSOR_SPEC_EVENT_PROCESSOR_FRB2   0x08 /* bit 3 */

IPMI_SDR_SENSOR_SPEC_EVENT_PROCESSOR_FRB3

#define IPMI_SDR_SENSOR_SPEC_EVENT_PROCESSOR_FRB3   0x10 /* bit 4 */

IPMI_SDR_SENSOR_SPEC_EVENT_PROCESSOR_IERR

#define IPMI_SDR_SENSOR_SPEC_EVENT_PROCESSOR_IERR   0x01 /* bit 0 */

IPMI_SDR_SENSOR_SPEC_EVENT_PROCESSOR_MCERR

#define IPMI_SDR_SENSOR_SPEC_EVENT_PROCESSOR_MCERR   0x08 /* bit 11 */

IPMI_SDR_SENSOR_SPEC_EVENT_PROCESSOR_PRESENCE

#define IPMI_SDR_SENSOR_SPEC_EVENT_PROCESSOR_PRESENCE   0x80 /* bit 7 */

IPMI_SDR_SENSOR_SPEC_EVENT_PROCESSOR_THERMAL_TRIP

#define IPMI_SDR_SENSOR_SPEC_EVENT_PROCESSOR_THERMAL_TRIP   0x02 /* bit 1 */

IPMI_SDR_SENSOR_SPEC_EVENT_SLP_S3

#define IPMI_SDR_SENSOR_SPEC_EVENT_SLP_S3   0x02 /* bit 1 */

IPMI_SDR_SENSOR_SPEC_EVENT_SLP_S4

#define IPMI_SDR_SENSOR_SPEC_EVENT_SLP_S4   0x01 /* bit 0 */

IPMI_SDR_SENSOR_SPEC_EVENT_SYS_EVENT_ADD_AUXI

#define IPMI_SDR_SENSOR_SPEC_EVENT_SYS_EVENT_ADD_AUXI   0x08 /* bit 3 */

IPMI_SDR_SENSOR_SPEC_EVENT_SYS_EVENT_CLOCK

#define IPMI_SDR_SENSOR_SPEC_EVENT_SYS_EVENT_CLOCK   0x20 /* bit 5 */

IPMI_SDR_SENSOR_SPEC_EVENT_SYS_EVENT_HW_FAIL

#define IPMI_SDR_SENSOR_SPEC_EVENT_SYS_EVENT_HW_FAIL   0x04 /* bit 2 */

IPMI_SDR_SENSOR_SPEC_EVENT_SYS_EVENT_OEM

#define IPMI_SDR_SENSOR_SPEC_EVENT_SYS_EVENT_OEM   0x02 /* bit 1 */

IPMI_SDR_SENSOR_SPEC_EVENT_SYS_EVENT_PEF

#define IPMI_SDR_SENSOR_SPEC_EVENT_SYS_EVENT_PEF   0x10 /* bit 4 */

IPMI_SDR_SENSOR_SPEC_EVENT_SYS_EVENT_RECONFIG

#define IPMI_SDR_SENSOR_SPEC_EVENT_SYS_EVENT_RECONFIG   0x01 /* bit 0 */

IPMI_SDR_SENSOR_SPEC_EVENT_SYS_FIVR_FAULT

#define IPMI_SDR_SENSOR_SPEC_EVENT_SYS_FIVR_FAULT   0x02 /* bit 1 */

IPMI_SDR_SENSOR_SPEC_EVENT_SYS_FW_HANG

#define IPMI_SDR_SENSOR_SPEC_EVENT_SYS_FW_HANG   0x02 /* bit 1 */

IPMI_SDR_SENSOR_SPEC_EVENT_SYS_FW_POST_ERR

#define IPMI_SDR_SENSOR_SPEC_EVENT_SYS_FW_POST_ERR   0x01 /* bit 0 */

IPMI_SDR_SENSOR_SPEC_EVENT_SYS_FW_PROGRESS

#define IPMI_SDR_SENSOR_SPEC_EVENT_SYS_FW_PROGRESS   0x04 /* bit 2 */

IPMI_SDR_SENSOR_SPEC_EVENT_SYS_PCHHOT

#define IPMI_SDR_SENSOR_SPEC_EVENT_SYS_PCHHOT   0x08 /* bit 3 */

IPMI_SDR_SENSOR_SPEC_EVENT_SYS_PWROK

#define IPMI_SDR_SENSOR_SPEC_EVENT_SYS_PWROK   0x08 /* bit 3 */

IPMI_SDR_SENSOR_SPEC_EVENT_SYS_THERMAL_TRIP

#define IPMI_SDR_SENSOR_SPEC_EVENT_SYS_THERMAL_TRIP   0x01 /* bit 0 */

IPMI_SDR_SENSOR_SPEC_EVENT_SYS_THROTTLE

#define IPMI_SDR_SENSOR_SPEC_EVENT_SYS_THROTTLE   0x04 /* bit 2 */

IPMI_SDR_SENSOR_SPEC_EVENT_WDT2_CYCLE

#define IPMI_SDR_SENSOR_SPEC_EVENT_WDT2_CYCLE   0x08 /* bit 3 */

IPMI_SDR_SENSOR_SPEC_EVENT_WDT2_DOWN

#define IPMI_SDR_SENSOR_SPEC_EVENT_WDT2_DOWN   0x04 /* bit 2 */

IPMI_SDR_SENSOR_SPEC_EVENT_WDT2_EXPIRE

#define IPMI_SDR_SENSOR_SPEC_EVENT_WDT2_EXPIRE   0x01 /* bit 0 */

IPMI_SDR_SENSOR_SPEC_EVENT_WDT2_INT

#define IPMI_SDR_SENSOR_SPEC_EVENT_WDT2_INT   0x01 /* bit 8 */

IPMI_SDR_SENSOR_SPEC_EVENT_WDT2_RESET

#define IPMI_SDR_SENSOR_SPEC_EVENT_WDT2_RESET   0x02 /* bit 1 */

IPMI_SDR_SENSOR_TYPE_BOOT_ERR

#define IPMI_SDR_SENSOR_TYPE_BOOT_ERR   0x1E

IPMI_SDR_SENSOR_TYPE_BUTTON

#define IPMI_SDR_SENSOR_TYPE_BUTTON   0x14

IPMI_SDR_SENSOR_TYPE_CRITICAL_INT

#define IPMI_SDR_SENSOR_TYPE_CRITICAL_INT   0x13

IPMI_SDR_SENSOR_TYPE_CURRENT

#define IPMI_SDR_SENSOR_TYPE_CURRENT   0x03

IPMI_SDR_SENSOR_TYPE_EVENT_LOG

#define IPMI_SDR_SENSOR_TYPE_EVENT_LOG   0x10

IPMI_SDR_SENSOR_TYPE_FAN

#define IPMI_SDR_SENSOR_TYPE_FAN   0x04

IPMI_SDR_SENSOR_TYPE_MANGE_HEALTH

#define IPMI_SDR_SENSOR_TYPE_MANGE_HEALTH   0x28

IPMI_SDR_SENSOR_TYPE_MEMORY

#define IPMI_SDR_SENSOR_TYPE_MEMORY   0x0C

IPMI_SDR_SENSOR_TYPE_OEM

#define IPMI_SDR_SENSOR_TYPE_OEM   0xC0

IPMI_SDR_SENSOR_TYPE_OTHER_UNIT_BASE

#define IPMI_SDR_SENSOR_TYPE_OTHER_UNIT_BASE   0x0B

IPMI_SDR_SENSOR_TYPE_PHY_SECURITY

#define IPMI_SDR_SENSOR_TYPE_PHY_SECURITY   0x05

IPMI_SDR_SENSOR_TYPE_POWER_SUPPLY

#define IPMI_SDR_SENSOR_TYPE_POWER_SUPPLY   0x08

IPMI_SDR_SENSOR_TYPE_POWER_UNIT

#define IPMI_SDR_SENSOR_TYPE_POWER_UNIT   0x09

IPMI_SDR_SENSOR_TYPE_PROCESSOR

#define IPMI_SDR_SENSOR_TYPE_PROCESSOR   0x07

IPMI_SDR_SENSOR_TYPE_SECURITY_VIO

#define IPMI_SDR_SENSOR_TYPE_SECURITY_VIO   0x06

IPMI_SDR_SENSOR_TYPE_SYS_EVENT

#define IPMI_SDR_SENSOR_TYPE_SYS_EVENT   0x12

IPMI_SDR_SENSOR_TYPE_SYS_FW

#define IPMI_SDR_SENSOR_TYPE_SYS_FW   0x0F

IPMI_SDR_SENSOR_TYPE_TEMPERATURE

#define IPMI_SDR_SENSOR_TYPE_TEMPERATURE   0x01

IPMI_SDR_SENSOR_TYPE_VOLTAGE

#define IPMI_SDR_SENSOR_TYPE_VOLTAGE   0x02

IPMI_SDR_SENSOR_TYPE_WATCHDOG2

#define IPMI_SDR_SENSOR_TYPE_WATCHDOG2   0x23

IPMI_SDR_STRING_TYPE_ASCII_6

#define IPMI_SDR_STRING_TYPE_ASCII_6   0x80

IPMI_SDR_STRING_TYPE_ASCII_8

#define IPMI_SDR_STRING_TYPE_ASCII_8   0xC0

IPMI_SDR_STRING_TYPE_BCD

#define IPMI_SDR_STRING_TYPE_BCD   0x40

IPMI_SDR_UCT_READABLE

#define IPMI_SDR_UCT_READABLE   0x10 /* bit 4 */

IPMI_SDR_UCT_SETTABLE

#define IPMI_SDR_UCT_SETTABLE   0x10 /* bit 12 */

IPMI_SDR_UNCT_READABLE

#define IPMI_SDR_UNCT_READABLE   0x08 /* bit 3 */

IPMI_SDR_UNCT_SETTABLE

#define IPMI_SDR_UNCT_SETTABLE   0x08 /* bit 11 */

IPMI_SDR_UNRT_READABLE

#define IPMI_SDR_UNRT_READABLE   0x20 /* bit 5 */

IPMI_SDR_UNRT_SETTABLE

#define IPMI_SDR_UNRT_SETTABLE   0x20 /* bit 13 */

IPMI_SDR_VER_15

#define IPMI_SDR_VER_15   0x51

IPMI_SENSOR_UNIT_AMP

#define IPMI_SENSOR_UNIT_AMP   0x05

IPMI_SENSOR_UNIT_DEGREE_C

#define IPMI_SENSOR_UNIT_DEGREE_C   0x01

IPMI_SENSOR_UNIT_DEGREE_F

#define IPMI_SENSOR_UNIT_DEGREE_F   0x02

IPMI_SENSOR_UNIT_DEGREE_K

#define IPMI_SENSOR_UNIT_DEGREE_K   0x03

IPMI_SENSOR_UNIT_RPM

#define IPMI_SENSOR_UNIT_RPM   0x12

IPMI_SENSOR_UNIT_UNSPECIFIED

#define IPMI_SENSOR_UNIT_UNSPECIFIED   0x00

IPMI_SENSOR_UNIT_VOL

#define IPMI_SENSOR_UNIT_VOL   0x04

IPMI_SENSOR_UNIT_WATT

#define IPMI_SENSOR_UNIT_WATT   0x06

MAX_SDR_SENSOR_NAME_LEN

#define MAX_SDR_SENSOR_NAME_LEN   32

SDR_END_ID

#define SDR_END_ID   0xFFFF

SDR_INVALID_ID

#define SDR_INVALID_ID   0xFFFE

SDR_M

#define SDR_M

(

sensor_num

)

Value:

    (((full_sdr_table[sdr_index_map[sensor_num]].M_tolerance & 0xC0) << 2) |                   \
     full_sdr_table[sdr_index_map[sensor_num]].M)

SDR_R

#define SDR_R

(

sensor_num

)

((full_sdr_table[sdr_index_map[sensor_num]].RexpBexp >> 4) & 0x0F)

SDR_Rexp

#define SDR_Rexp

(

sensor_num

)

negative_ten_power[SDR_R(sensor_num)]

Typedef Documentation

SDR_Full_sensor

typedef struct _SDR_Full_sensor_ SDR_Full_sensor

SDR_INFO

typedef struct _SDR_INFO_ SDR_INFO

Enumeration Type Documentation

anonymous enum

anonymous enum

Enumerator
THRESHOLD_UNR
THRESHOLD_UCR
THRESHOLD_UNC
THRESHOLD_LNR
THRESHOLD_LCR
THRESHOLD_LNC
MBR_M
MBR_B
MBR_R

rsv_table_index

enum rsv_table_index

Enumerator
RSV_TABLE_INDEX_0
RSV_TABLE_INDEX_1

Function Documentation

add_full_sdr_table()

void add_full_sdr_table

(

SDR_Full_sensor

add_item

)

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change_sensor_mbr()

void change_sensor_mbr	(	uint8_t	sensor_num,
		uint8_t	mbr_type,
		uint16_t	change_value
	)

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change_sensor_threshold()

void change_sensor_threshold	(	uint8_t	sensor_num,
		uint8_t	threshold_type,
		uint8_t	change_value
	)

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check_sdr_num_exist()

bool check_sdr_num_exist

(

uint8_t

sensor_num

)

load_sdr_table()

void load_sdr_table

(

void

)

pal_fix_full_sdr_table()

void pal_fix_full_sdr_table

(

void

)

plat_get_sdr_size()

uint8_t plat_get_sdr_size

(

)

SDR_check_record_ID()

bool SDR_check_record_ID

(

uint16_t

current_ID

)

SDR_get_record_ID()

uint16_t SDR_get_record_ID

(

uint16_t

current_ID

)

SDR_get_RSV_ID()

uint16_t SDR_get_RSV_ID

(

uint8_t

rsv_table_index

)

sdr_init()

uint8_t sdr_init

(

void

)

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SDR_RSV_ID_check()

bool SDR_RSV_ID_check	(	uint16_t	ID,
		uint8_t	rsv_table_index
	)

Variable Documentation

full_sdr_table

SDR_Full_sensor* full_sdr_table

extern

is_sdr_not_init

bool is_sdr_not_init

extern

negative_ten_power

const int negative_ten_power[16]

extern

sdr_count

uint8_t sdr_count

extern

sdr_index_map

uint8_t sdr_index_map[]

extern

sensor_config_size

uint8_t sensor_config_size

extern