nct7363.h File Reference

#include "sensor.h"

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Classes
struct	_nct7363_init_arg

Macros
#define	NCT7363_REG_DID   0xFD
#define	NCT7363_ID_MASK   0xFFFFFF
#define	NCT7363_ID   (0x491988 & NCT7363_ID_MASK) /* Chip ID */
#define	NCT7363_REG_I2C_ADDR   0x46
#define	NCT7363_REG_GLOBAL_CONTROL   0x00
#define	GPIO0X_IO_CONF_REG   0x03
#define	GPIO1X_IO_CONF_REG   0x13
#define	GPIO_00_TO_03_PIN_CONFIGURATION_REG   0x20
#define	GPIO_04_TO_07_PIN_CONFIGURATION_REG   0x21
#define	GPIO_10_TO_13_PIN_CONFIGURATION_REG   0x22
#define	GPIO_14_TO_17_PIN_CONFIGURATION_REG   0x23
#define	NCT7363_PWM_CTRL_OUTPUT_0_TO_7_REG   0x38
#define	NCT7363_PWM_CTRL_OUTPUT_8_TO_15_REG   0x39
#define	NCT7363_FANIN_ENABLE_0_TO_7_REG   0x41
#define	NCT7363_FANIN_ENABLE_8_TO_15_REG   0x42
#define	NCT7363_REG_FAN_COUNT_VALUE_HIGH_BYTE_BASE_OFFSET   0x48
#define	NCT7363_REG_FAN_COUNT_VALUE_LOW_BYTE_BASE_OFFSET   0x49
#define	FANIN_MONOTORING_GLOBAL_CONTROLLER_REG   0x40
#define	NCT7363_REG_PWM_BASE_OFFSET   0x90
#define	SPEED_CONTROL_PORT_CONF_REG_BASE_OFFSET   0xB0
#define	SPEED_CONTROL_PORT_DIVISOR_BASE_OFFSET   0x91
#define	FAN_STATUS_0_TO_7_REG   0x34
#define	FAN_STATUS_8_TO_15_REG   0x35
#define	NCT7363_FAN_COUNT_THRESHOLD_REG_HIGH_BYTE_BASE_OFFSET   0x6C
#define	NCT7363_FAN_COUNT_THRESHOLD_REG_LOW_BYTE_BASE_OFFSET   0x6D
#define	NCT7363_GPIO0x_INPUT_PORT_REG_OFFSET   0x00
#define	NCT7363_GPIO1x_INPUT_PORT_REG_OFFSET   0x10
#define	NCT7363_GPIO0x_OUTPUT_PORT_REG_OFFSET   0x01
#define	NCT7363_GPIO1x_OUTPUT_PORT_REG_OFFSET   0x11
#define	NCT7363_GPIO03_GPIO07_ALERT_LED_REG_OFFSET   0x09
#define	NCT7363_WDT_REG_OFFSET   0x2A

Typedefs
typedef struct _nct7363_init_arg	nct7363_init_arg

Enumerations
enum	nct7363_port {   NCT7363_1_PORT , NCT7363_2_PORT , NCT7363_3_PORT , NCT7363_4_PORT ,   NCT7363_5_PORT , NCT7363_6_PORT , NCT7363_7_PORT , NCT7363_8_PORT ,   NCT7363_10_PORT , NCT7363_11_PORT , NCT7363_12_PORT , NCT7363_13_PORT ,   NCT7363_14_PORT , NCT7363_15_PORT , NCT7363_16_PORT , NCT7363_17_PORT }
enum	nct7363_sensor_offset { NCT7363_FAN_SPEED_OFFSET , NCT7363_FAN_STATUS_OFFSET , NCT7363_GPIO_READ_OFFSET }
enum	nct7363_pin_type {   NCT7363_PIN_TPYE_GPIO , NCT7363_PIN_TPYE_PWM , NCT7363_PIN_TPYE_FANIN , NCT7363_PIN_TPYE_RESERVED ,   NCT7363_PIN_TPYE_GPIO_DEFAULT_OUTPUT , NCT7363_PIN_TPYE_ERROR }
enum	nct7363_gpio_type { NCT7363_GPIO_OUTPUT , NCT7363_GPIO_INPUT }
enum	nct7363_wdt_sec {   WDT_15_SEC , WDT_3_75_SEC , WDT_7_5_SEC , WDT_30_SEC ,   WDT_DISABLE , WDT_ERROR }

Functions
bool	nct7363_set_duty (sensor_cfg *cfg, uint8_t duty, uint8_t port)
uint8_t	nct7363_init (sensor_cfg *cfg)
bool	nct7363_setting_wdt (sensor_cfg *cfg, uint8_t wdt)
bool	nct7363_read_back_data (sensor_cfg *cfg, uint8_t reading_offset, uint8_t *val)
bool	nct7363_write (sensor_cfg *cfg, uint8_t offset, uint8_t val)

Macro Definition Documentation

FAN_STATUS_0_TO_7_REG

#define FAN_STATUS_0_TO_7_REG   0x34

FAN_STATUS_8_TO_15_REG

#define FAN_STATUS_8_TO_15_REG   0x35

FANIN_MONOTORING_GLOBAL_CONTROLLER_REG

#define FANIN_MONOTORING_GLOBAL_CONTROLLER_REG   0x40

GPIO0X_IO_CONF_REG

#define GPIO0X_IO_CONF_REG   0x03

GPIO1X_IO_CONF_REG

#define GPIO1X_IO_CONF_REG   0x13

GPIO_00_TO_03_PIN_CONFIGURATION_REG

#define GPIO_00_TO_03_PIN_CONFIGURATION_REG   0x20

GPIO_04_TO_07_PIN_CONFIGURATION_REG

#define GPIO_04_TO_07_PIN_CONFIGURATION_REG   0x21

GPIO_10_TO_13_PIN_CONFIGURATION_REG

#define GPIO_10_TO_13_PIN_CONFIGURATION_REG   0x22

GPIO_14_TO_17_PIN_CONFIGURATION_REG

#define GPIO_14_TO_17_PIN_CONFIGURATION_REG   0x23

NCT7363_FAN_COUNT_THRESHOLD_REG_HIGH_BYTE_BASE_OFFSET

#define NCT7363_FAN_COUNT_THRESHOLD_REG_HIGH_BYTE_BASE_OFFSET   0x6C

NCT7363_FAN_COUNT_THRESHOLD_REG_LOW_BYTE_BASE_OFFSET

#define NCT7363_FAN_COUNT_THRESHOLD_REG_LOW_BYTE_BASE_OFFSET   0x6D

NCT7363_FANIN_ENABLE_0_TO_7_REG

#define NCT7363_FANIN_ENABLE_0_TO_7_REG   0x41

NCT7363_FANIN_ENABLE_8_TO_15_REG

#define NCT7363_FANIN_ENABLE_8_TO_15_REG   0x42

NCT7363_GPIO03_GPIO07_ALERT_LED_REG_OFFSET

#define NCT7363_GPIO03_GPIO07_ALERT_LED_REG_OFFSET   0x09

NCT7363_GPIO0x_INPUT_PORT_REG_OFFSET

#define NCT7363_GPIO0x_INPUT_PORT_REG_OFFSET   0x00

NCT7363_GPIO0x_OUTPUT_PORT_REG_OFFSET

#define NCT7363_GPIO0x_OUTPUT_PORT_REG_OFFSET   0x01

NCT7363_GPIO1x_INPUT_PORT_REG_OFFSET

#define NCT7363_GPIO1x_INPUT_PORT_REG_OFFSET   0x10

NCT7363_GPIO1x_OUTPUT_PORT_REG_OFFSET

#define NCT7363_GPIO1x_OUTPUT_PORT_REG_OFFSET   0x11

NCT7363_ID

#define NCT7363_ID   (0x491988 & NCT7363_ID_MASK) /* Chip ID */

NCT7363_ID_MASK

#define NCT7363_ID_MASK   0xFFFFFF

NCT7363_PWM_CTRL_OUTPUT_0_TO_7_REG

#define NCT7363_PWM_CTRL_OUTPUT_0_TO_7_REG   0x38

NCT7363_PWM_CTRL_OUTPUT_8_TO_15_REG

#define NCT7363_PWM_CTRL_OUTPUT_8_TO_15_REG   0x39

NCT7363_REG_DID

#define NCT7363_REG_DID   0xFD

NCT7363_REG_FAN_COUNT_VALUE_HIGH_BYTE_BASE_OFFSET

#define NCT7363_REG_FAN_COUNT_VALUE_HIGH_BYTE_BASE_OFFSET   0x48

NCT7363_REG_FAN_COUNT_VALUE_LOW_BYTE_BASE_OFFSET

#define NCT7363_REG_FAN_COUNT_VALUE_LOW_BYTE_BASE_OFFSET   0x49

NCT7363_REG_GLOBAL_CONTROL

#define NCT7363_REG_GLOBAL_CONTROL   0x00

NCT7363_REG_I2C_ADDR

#define NCT7363_REG_I2C_ADDR   0x46

NCT7363_REG_PWM_BASE_OFFSET

#define NCT7363_REG_PWM_BASE_OFFSET   0x90

NCT7363_WDT_REG_OFFSET

#define NCT7363_WDT_REG_OFFSET   0x2A

SPEED_CONTROL_PORT_CONF_REG_BASE_OFFSET

#define SPEED_CONTROL_PORT_CONF_REG_BASE_OFFSET   0xB0

SPEED_CONTROL_PORT_DIVISOR_BASE_OFFSET

#define SPEED_CONTROL_PORT_DIVISOR_BASE_OFFSET   0x91

Typedef Documentation

nct7363_init_arg

typedef struct _nct7363_init_arg nct7363_init_arg

Enumeration Type Documentation

nct7363_gpio_type

enum nct7363_gpio_type

Enumerator
NCT7363_GPIO_OUTPUT
NCT7363_GPIO_INPUT

nct7363_pin_type

enum nct7363_pin_type

Enumerator
NCT7363_PIN_TPYE_GPIO
NCT7363_PIN_TPYE_PWM
NCT7363_PIN_TPYE_FANIN
NCT7363_PIN_TPYE_RESERVED
NCT7363_PIN_TPYE_GPIO_DEFAULT_OUTPUT
NCT7363_PIN_TPYE_ERROR

nct7363_port

enum nct7363_port

Enumerator
NCT7363_1_PORT
NCT7363_2_PORT
NCT7363_3_PORT
NCT7363_4_PORT
NCT7363_5_PORT
NCT7363_6_PORT
NCT7363_7_PORT
NCT7363_8_PORT
NCT7363_10_PORT
NCT7363_11_PORT
NCT7363_12_PORT
NCT7363_13_PORT
NCT7363_14_PORT
NCT7363_15_PORT
NCT7363_16_PORT
NCT7363_17_PORT

nct7363_sensor_offset

enum nct7363_sensor_offset

Enumerator
NCT7363_FAN_SPEED_OFFSET
NCT7363_FAN_STATUS_OFFSET
NCT7363_GPIO_READ_OFFSET

nct7363_wdt_sec

enum nct7363_wdt_sec

Enumerator
WDT_15_SEC
WDT_3_75_SEC
WDT_7_5_SEC
WDT_30_SEC
WDT_DISABLE
WDT_ERROR

Function Documentation

nct7363_init()

uint8_t nct7363_init

(

sensor_cfg *

cfg

)

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nct7363_read_back_data()

bool nct7363_read_back_data	(	sensor_cfg *	cfg,
		uint8_t	reading_offset,
		uint8_t *	val
	)

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nct7363_set_duty()

bool nct7363_set_duty	(	sensor_cfg *	cfg,
		uint8_t	duty,
		uint8_t	port
	)

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nct7363_setting_wdt()

bool nct7363_setting_wdt	(	sensor_cfg *	cfg,
		uint8_t	wdt
	)

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nct7363_write()

bool nct7363_write	(	sensor_cfg *	cfg,
		uint8_t	offset,
		uint8_t	val
	)

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