#include "pldm.h"
#include <stdint.h>
Go to the source code of this file.
|
enum | cmd_type {
POST_CODE = 0x00
, BIOS_VERSION = 0x01
, POWER_CONTROL = 0x02
, HTTP_BOOT = 0X03
,
APML_ALERT = 0x04
, EVENT_LOG = 0x05
, CRASH_DUMP = 0x06
, BOOT_ORDER = 0x07
} |
|
enum | POWER_CONTROL_OPTION {
SLED_CYCLE = 0x00
, SLOT_12V_CYCLE = 0x01
, SLOT_DC_CYCLE = 0x02
, NIC0_POWER_CYCLE = 0x03
,
NIC1_POWER_CYCLE = 0x04
, NIC2_POWER_CYCLE = 0x05
, NIC3_POWER_CYCLE = 0x06
, MAX_POWER_OPTION
} |
|
enum | oem_event_type {
CPU_THERMAL_TRIP = 0x00
, HSC_OCP
, P12V_STBY_UV
, PMALERT_ASSERT
,
FAST_PROCHOT_ASSERT
, FRB3_TIMER_EXPIRE
, POWER_ON_SEQUENCE_FAIL
, DIMM_PMIC_ERROR
,
ADDC_DUMP
, BMC_COMES_OUT_COLD_RESET
, BIOS_FRB2_WDT_EXPIRE
, BIC_POWER_FAIL
,
CPU_POWER_FAIL
, BMC_VBOOT_FAIL
, BMC_REBOOT_REQUESTED
, CHASSIS_POWER_ON_BY_NIC_INSERT
,
BLADE_POWER_CYCLE_BY_BLADE_BTN
, CHASSIS_POWER_CYCLE_BY_SLED_BTN
, HSC_FAULT
, SYS_THROTTLE
,
VR_FAULT
, SYS_MANAGEMENT_ERROR
, POST_COMPLETED
, FAN_ERROR
,
HDT_PRSNT_ASSERT
, PLTRST_ASSERT
, APML_ALERT_ASSERT
, CXL1_HB
,
CXL2_HB
, POST_STARTED
, POST_ENDED
, PROCHOT_TRIGGERED_BY_SENSOR_UCR
,
FRB2_WDT_HARD_RST
, FRB2_WDT_PWR_DOWN
, FRB2_WDT_PWR_CYCLE
, OS_LOAD_WDT_EXPIRED
,
OS_LOAD_WDT_HARD_RST
, OS_LOAD_WDT_PWR_DOWN
, OS_LOAD_WDT_PWR_CYCLE
, MTIA_FAULT
,
POST_TIMEOUTED
} |
|
enum | vr_event_source {
PVDDCR_CPU0 = 0x00
, PVDDCR_SOC
, PVDDCR_CPU1
, PVDDIO
,
PVDD11_S3
, PVDDQ_AB_ASIC1
, P0V85_ASIC1
, PVDDQ_CD_ASIC1
,
P0V8_ASIC1
, PVDDQ_AB_ASIC2
, P0V85_ASIC2
, PVDDQ_CD_ASIC2
,
P0V8_ASIC2
, P1V5_RETIMER_1
, P0V9_STBY_1
, P3V3_E1S_0
,
P3V3_E1S_1
, P12V_E1S_0
, P12V_E1S_1
, PVTT_AB_ASIC1
,
PVTT_AB_ASIC2
, PVTT_CD_ASIC1
, PVTT_CD_ASIC2
, PVPP_AB_ASIC1
,
PVPP_AB_ASIC2
, PVPP_CD_ASIC1
, PVPP_CD_ASIC2
} |
|
enum | mtia_event_source {
MTIA_P3V3 = 0
, MTIA_P0V85_PVDD
, MTIA_P0V75_PVDD_CH_N
, MTIA_P0V75_MAX_PHY_N
,
MTIA_P0V75_PVDD_CH_S
, MTIA_P0V75_MAX_PHY_S
, MTIA_P0V75_TRVDD_ZONEA
, MTIA_P1V8_VPP_HBM0_HBM2_HBM4
,
MTIA_P0V75_TRVDD_ZONEB
, MTIA_P0V4_VDDQL_HBM0_HBM2_HBM4
, MTIA_P1V1_VDDC_HBM0_HBM2_HBM4
, MTIA_P0V75_VDDPHY_HBM0_HBM2_HBM4
,
MTIA_P0V9_TRVDD_ZONEA
, MTIA_P1V8_VPP_HBM1_HBM3_HBM5
, MTIA_P0V9_TRVDD_ZONEB
, MTIA_P0V4_VDDQL_HBM1_HBM3_HBM5
,
MTIA_P1V1_VDDC_HBM1_HBM3_HBM5
, MTIA_P0V75_VDDPHY_HBM1_HBM3_HBM5
, MTIA_P0V8_VDDA_PCIE
, MTIA_P1V2_VDDHTX_PCIE
,
MTIA_P12V_UBC1
, MTIA_P12V_UBC2
, MTIA_VR_MAX
, MTIA_PLL_VDDA15_PCIE_MAX_CORE = 0x30
,
MTIA_P0V75_AVDD_HSCL
, MTIA_P0V75_VDDC_CLKOBS
, MTIA_PLL_VDDA15_MAX_CORE_N
, MTIA_PVDD1P5_S
,
MTIA_PVDD1P5_N
, MTIA_PVDD0P9_S
, MTIA_PVDD0P9_N
, MTIA_PLL_VDDA15_HBM0_HBM2_HBM4
,
MTIA_PLL_VDDA15_HBM1_HBM3_HBM5
, MTIA_P3V3_OSC
, MTIA_P5V
, MTIA_LDO_IN_1V8
,
MTIA_LDO_IN_1V2
, MTIA_PLL_VDDA15_MAX_CORE_S
, MTIA_POWER_ON_SEQUENCE_FAIL = 0x50
, MTIA_FM_ASIC_0_THERMTRIP_N
,
MTIA_FM_ATH_PLD_HBM3_CATTRIP_ALARM
} |
|
enum | READ_FILE_OPTION { READ_FILE_ATTR
, READ_FILE_DATA
} |
|
◆ EVENT_ASSERTED
#define EVENT_ASSERTED 0x01 |
◆ EVENT_DEASSERTED
#define EVENT_DEASSERTED 0x00 |
◆ IANA_LEN
◆ OEM_EVENT_LEN
#define OEM_EVENT_LEN 0x05 |
◆ PLDM_OEM_CMD_ECHO
#define PLDM_OEM_CMD_ECHO 0x00 |
◆ PLDM_OEM_IPMI_BRIDGE
#define PLDM_OEM_IPMI_BRIDGE 0x01 |
◆ PLDM_OEM_READ_FILE_IO
#define PLDM_OEM_READ_FILE_IO 0x03 |
◆ PLDM_OEM_SENSOR_POLLING_CMD
#define PLDM_OEM_SENSOR_POLLING_CMD 0x04 |
◆ PLDM_OEM_WRITE_FILE_IO
#define PLDM_OEM_WRITE_FILE_IO 0x02 |
◆ POWER_CONTROL_LEN
#define POWER_CONTROL_LEN 0x01 |
◆ cmd_type
Enumerator |
---|
POST_CODE | |
BIOS_VERSION | |
POWER_CONTROL | |
HTTP_BOOT | |
APML_ALERT | |
EVENT_LOG | |
CRASH_DUMP | |
BOOT_ORDER | |
◆ mtia_event_source
Enumerator |
---|
MTIA_P3V3 | |
MTIA_P0V85_PVDD | |
MTIA_P0V75_PVDD_CH_N | |
MTIA_P0V75_MAX_PHY_N | |
MTIA_P0V75_PVDD_CH_S | |
MTIA_P0V75_MAX_PHY_S | |
MTIA_P0V75_TRVDD_ZONEA | |
MTIA_P1V8_VPP_HBM0_HBM2_HBM4 | |
MTIA_P0V75_TRVDD_ZONEB | |
MTIA_P0V4_VDDQL_HBM0_HBM2_HBM4 | |
MTIA_P1V1_VDDC_HBM0_HBM2_HBM4 | |
MTIA_P0V75_VDDPHY_HBM0_HBM2_HBM4 | |
MTIA_P0V9_TRVDD_ZONEA | |
MTIA_P1V8_VPP_HBM1_HBM3_HBM5 | |
MTIA_P0V9_TRVDD_ZONEB | |
MTIA_P0V4_VDDQL_HBM1_HBM3_HBM5 | |
MTIA_P1V1_VDDC_HBM1_HBM3_HBM5 | |
MTIA_P0V75_VDDPHY_HBM1_HBM3_HBM5 | |
MTIA_P0V8_VDDA_PCIE | |
MTIA_P1V2_VDDHTX_PCIE | |
MTIA_P12V_UBC1 | |
MTIA_P12V_UBC2 | |
MTIA_VR_MAX | |
MTIA_PLL_VDDA15_PCIE_MAX_CORE | |
MTIA_P0V75_AVDD_HSCL | |
MTIA_P0V75_VDDC_CLKOBS | |
MTIA_PLL_VDDA15_MAX_CORE_N | |
MTIA_PVDD1P5_S | |
MTIA_PVDD1P5_N | |
MTIA_PVDD0P9_S | |
MTIA_PVDD0P9_N | |
MTIA_PLL_VDDA15_HBM0_HBM2_HBM4 | |
MTIA_PLL_VDDA15_HBM1_HBM3_HBM5 | |
MTIA_P3V3_OSC | |
MTIA_P5V | |
MTIA_LDO_IN_1V8 | |
MTIA_LDO_IN_1V2 | |
MTIA_PLL_VDDA15_MAX_CORE_S | |
MTIA_POWER_ON_SEQUENCE_FAIL | |
MTIA_FM_ASIC_0_THERMTRIP_N | |
MTIA_FM_ATH_PLD_HBM3_CATTRIP_ALARM | |
◆ oem_event_type
Enumerator |
---|
CPU_THERMAL_TRIP | |
HSC_OCP | |
P12V_STBY_UV | |
PMALERT_ASSERT | |
FAST_PROCHOT_ASSERT | |
FRB3_TIMER_EXPIRE | |
POWER_ON_SEQUENCE_FAIL | |
DIMM_PMIC_ERROR | |
ADDC_DUMP | |
BMC_COMES_OUT_COLD_RESET | |
BIOS_FRB2_WDT_EXPIRE | |
BIC_POWER_FAIL | |
CPU_POWER_FAIL | |
BMC_VBOOT_FAIL | |
BMC_REBOOT_REQUESTED | |
CHASSIS_POWER_ON_BY_NIC_INSERT | |
BLADE_POWER_CYCLE_BY_BLADE_BTN | |
CHASSIS_POWER_CYCLE_BY_SLED_BTN | |
HSC_FAULT | |
SYS_THROTTLE | |
VR_FAULT | |
SYS_MANAGEMENT_ERROR | |
POST_COMPLETED | |
FAN_ERROR | |
HDT_PRSNT_ASSERT | |
PLTRST_ASSERT | |
APML_ALERT_ASSERT | |
CXL1_HB | |
CXL2_HB | |
POST_STARTED | |
POST_ENDED | |
PROCHOT_TRIGGERED_BY_SENSOR_UCR | |
FRB2_WDT_HARD_RST | |
FRB2_WDT_PWR_DOWN | |
FRB2_WDT_PWR_CYCLE | |
OS_LOAD_WDT_EXPIRED | |
OS_LOAD_WDT_HARD_RST | |
OS_LOAD_WDT_PWR_DOWN | |
OS_LOAD_WDT_PWR_CYCLE | |
MTIA_FAULT | |
POST_TIMEOUTED | |
◆ POWER_CONTROL_OPTION
Enumerator |
---|
SLED_CYCLE | |
SLOT_12V_CYCLE | |
SLOT_DC_CYCLE | |
NIC0_POWER_CYCLE | |
NIC1_POWER_CYCLE | |
NIC2_POWER_CYCLE | |
NIC3_POWER_CYCLE | |
MAX_POWER_OPTION | |
◆ READ_FILE_OPTION
Enumerator |
---|
READ_FILE_ATTR | |
READ_FILE_DATA | |
◆ vr_event_source
Enumerator |
---|
PVDDCR_CPU0 | |
PVDDCR_SOC | |
PVDDCR_CPU1 | |
PVDDIO | |
PVDD11_S3 | |
PVDDQ_AB_ASIC1 | |
P0V85_ASIC1 | |
PVDDQ_CD_ASIC1 | |
P0V8_ASIC1 | |
PVDDQ_AB_ASIC2 | |
P0V85_ASIC2 | |
PVDDQ_CD_ASIC2 | |
P0V8_ASIC2 | |
P1V5_RETIMER_1 | |
P0V9_STBY_1 | |
P3V3_E1S_0 | |
P3V3_E1S_1 | |
P12V_E1S_0 | |
P12V_E1S_1 | |
PVTT_AB_ASIC1 | |
PVTT_AB_ASIC2 | |
PVTT_CD_ASIC1 | |
PVTT_CD_ASIC2 | |
PVPP_AB_ASIC1 | |
PVPP_AB_ASIC2 | |
PVPP_CD_ASIC1 | |
PVPP_CD_ASIC2 | |
◆ __attribute__()
◆ check_iana()
uint8_t check_iana |
( |
const uint8_t * |
iana | ) |
|
◆ pldm_oem_handler_query()
uint8_t pldm_oem_handler_query |
( |
uint8_t |
code, |
|
|
void ** |
ret_fn |
|
) |
| |
◆ send_event_log_to_bmc()
◆ set_iana()
uint8_t set_iana |
( |
uint8_t * |
buf, |
|
|
uint8_t |
buf_len |
|
) |
| |
◆ assert_type
◆ attr
◆ cmd
◆ cmd_code
◆ completion_code
◆ crc32
◆ data
◆ data_length
◆ event_data_1
◆ event_data_2
◆ event_data_3
◆ event_type
◆ first_data
◆ iana
◆ ipmi_comp_code
◆ messages
◆ netfn_lun
◆ offset
◆ read_info
◆ read_info_length
◆ read_option
◆ set_value
◆ size
◆ transfer_flag