#include "pldm.h"
#include <stdint.h>
Go to the source code of this file.
|
enum | cmd_type {
POST_CODE = 0x00
, BIOS_VERSION = 0x01
, POWER_CONTROL = 0x02
, HTTP_BOOT = 0X03
,
APML_ALERT = 0x04
, EVENT_LOG = 0x05
} |
|
enum | POWER_CONTROL_OPTION {
SLED_CYCLE = 0x00
, SLOT_12V_CYCLE = 0x01
, SLOT_DC_CYCLE = 0x02
, NIC0_POWER_CYCLE = 0x03
,
NIC1_POWER_CYCLE = 0x04
, NIC2_POWER_CYCLE = 0x05
, NIC3_POWER_CYCLE = 0x06
, MAX_POWER_OPTION
} |
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enum | oem_event_type {
CPU_THERMAL_TRIP = 0x00
, HSC_OCP
, P12V_STBY_UV
, PMALERT_ASSERT
,
FAST_PROCHOT_ASSERT
, FRB3_TIMER_EXPIRE
, POWER_ON_SEQUENCE_FAIL
, DIMM_PMIC_ERROR
,
ADDC_DUMP
, BMC_COMES_OUT_COLD_RESET
, BIOS_FRB2_WDT_EXPIRE
, BIC_POWER_FAIL
,
CPU_POWER_FAIL
, BMC_VBOOT_FAIL
, BMC_REBOOT_REQUESTED
, CHASSIS_POWER_ON_BY_NIC_INSERT
,
BLADE_POWER_CYCLE_BY_BLADE_BTN
, CHASSIS_POWER_CYCLE_BY_SLED_BTN
, HSC_FAULT
, SYS_THROTTLE
,
VR_FAULT
, SYS_MANAGEMENT_ERROR
, POST_COMPLETED
, FAN_ERROR
,
HDT_PRSNT_ASSERT
, PLTRST_ASSERT
, APML_ALERT_ASSERT
} |
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enum | vr_event_source {
PVDDCR_CPU0 = 0x00
, PVDDCR_SOC
, PVDDCR_CPU1
, PVDDIO
,
PVDD11_S3
} |
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enum | READ_FILE_OPTION { READ_FILE_ATTR
, READ_FILE_DATA
} |
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◆ EVENT_ASSERTED
#define EVENT_ASSERTED 0x01 |
◆ EVENT_DEASSERTED
#define EVENT_DEASSERTED 0x00 |
◆ IANA_LEN
◆ OEM_EVENT_LEN
#define OEM_EVENT_LEN 0x05 |
◆ PLDM_OEM_CMD_ECHO
#define PLDM_OEM_CMD_ECHO 0x00 |
◆ PLDM_OEM_IPMI_BRIDGE
#define PLDM_OEM_IPMI_BRIDGE 0x01 |
◆ PLDM_OEM_READ_FILE_IO
#define PLDM_OEM_READ_FILE_IO 0x03 |
◆ PLDM_OEM_WRITE_FILE_IO
#define PLDM_OEM_WRITE_FILE_IO 0x02 |
◆ POWER_CONTROL_LEN
#define POWER_CONTROL_LEN 0x01 |
◆ cmd_type
Enumerator |
---|
POST_CODE | |
BIOS_VERSION | |
POWER_CONTROL | |
HTTP_BOOT | |
APML_ALERT | |
EVENT_LOG | |
◆ oem_event_type
Enumerator |
---|
CPU_THERMAL_TRIP | |
HSC_OCP | |
P12V_STBY_UV | |
PMALERT_ASSERT | |
FAST_PROCHOT_ASSERT | |
FRB3_TIMER_EXPIRE | |
POWER_ON_SEQUENCE_FAIL | |
DIMM_PMIC_ERROR | |
ADDC_DUMP | |
BMC_COMES_OUT_COLD_RESET | |
BIOS_FRB2_WDT_EXPIRE | |
BIC_POWER_FAIL | |
CPU_POWER_FAIL | |
BMC_VBOOT_FAIL | |
BMC_REBOOT_REQUESTED | |
CHASSIS_POWER_ON_BY_NIC_INSERT | |
BLADE_POWER_CYCLE_BY_BLADE_BTN | |
CHASSIS_POWER_CYCLE_BY_SLED_BTN | |
HSC_FAULT | |
SYS_THROTTLE | |
VR_FAULT | |
SYS_MANAGEMENT_ERROR | |
POST_COMPLETED | |
FAN_ERROR | |
HDT_PRSNT_ASSERT | |
PLTRST_ASSERT | |
APML_ALERT_ASSERT | |
◆ POWER_CONTROL_OPTION
Enumerator |
---|
SLED_CYCLE | |
SLOT_12V_CYCLE | |
SLOT_DC_CYCLE | |
NIC0_POWER_CYCLE | |
NIC1_POWER_CYCLE | |
NIC2_POWER_CYCLE | |
NIC3_POWER_CYCLE | |
MAX_POWER_OPTION | |
◆ READ_FILE_OPTION
Enumerator |
---|
READ_FILE_ATTR | |
READ_FILE_DATA | |
◆ vr_event_source
Enumerator |
---|
PVDDCR_CPU0 | |
PVDDCR_SOC | |
PVDDCR_CPU1 | |
PVDDIO | |
PVDD11_S3 | |
◆ __attribute__()
◆ check_iana()
uint8_t check_iana |
( |
const uint8_t * |
iana | ) |
|
◆ pldm_oem_handler_query()
uint8_t pldm_oem_handler_query |
( |
uint8_t |
code, |
|
|
void ** |
ret_fn |
|
) |
| |
◆ send_event_log_to_bmc()
◆ set_iana()
uint8_t set_iana |
( |
uint8_t * |
buf, |
|
|
uint8_t |
buf_len |
|
) |
| |
◆ assert_type
◆ attr
◆ cmd
◆ cmd_code
◆ completion_code
◆ crc32
◆ data
◆ data_length
◆ event_data_1
◆ event_data_2
◆ event_data_3
◆ event_type
◆ first_data
◆ iana
◆ ipmi_comp_code
◆ messages
◆ netfn_lun
◆ offset
◆ read_info
◆ read_info_length
◆ read_option
◆ size
◆ transfer_flag