plat_isr.c File Reference

#include <logging/log.h>
#include "hal_gpio.h"
#include "hal_vw_gpio.h"
#include "libipmi.h"
#include "libutil.h"
#include "snoop.h"
#include "ipmb.h"
#include "ipmi.h"
#include "power_status.h"
#include "kcs.h"
#include "pmbus.h"
#include "util_worker.h"
#include "vr_fault.h"
#include "plat_i2c.h"
#include "plat_isr.h"
#include "plat_gpio.h"
#include "plat_ipmb.h"
#include "plat_dimm.h"
#include "plat_sensor_table.h"
#include "plat_pmic.h"
#include "plat_ipmi.h"

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Classes
struct	vgpio_info

Macros
#define	READ_PMIC_CRITICAL_ERROR_MS   100

Functions
	LOG_MODULE_REGISTER (plat_isr)
void	send_gpio_interrupt (uint8_t gpio_num)
	K_WORK_DELAYABLE_DEFINE (SLP3_work, SLP3_handler)
void	ISR_SLP3 ()
	K_WORK_DELAYABLE_DEFINE (set_DC_on_5s_work, set_DC_on_delayed_status)
	K_WORK_DELAYABLE_DEFINE (set_DC_off_10s_work, set_DC_off_delayed_status)
void	Set_DC_status ()
	K_WORK_DELAYABLE_DEFINE (PROC_FAIL_work, PROC_FAIL_handler)
	K_WORK_DELAYABLE_DEFINE (read_pmic_critical_work, read_pmic_error_when_dc_off)
	K_WORK_DEFINE (clear_pmic_error_work, clear_pmic_error)
void	Initialize_CPU ()
void	PWRGD_CPU_ACTIVE_HANDLE ()
void	ISR_BMC_PRDY ()
	K_WORK_DELAYABLE_DEFINE (CAT_ERR_work, CAT_ERR_handler)
void	ISR_CATERR ()
void	ISR_PLTRST ()
void	ISR_DBP_PRSNT ()
void	ISR_HSC_THROTTLE ()
	K_WORK_DELAYABLE_DEFINE (mb_throttle_work, mb_throttle_handler)
void	ISR_MB_THROTTLE ()
void	ISR_SOC_THMALTRIP ()
void	ISR_SYS_THROTTLE ()
void	ISR_HSC_OC ()
bool	pal_skip_pmbus_cmd_code (uint8_t vendor_type, uint8_t cmd, uint8_t page)
void	init_vr_pwr_fault_work ()
void	ISR_VR_PWR_FAULT ()
	K_WORK_DEFINE (cpu_memory_hot_work, cpu_memory_hot_handler)
void	ISR_CPU_MEMHOT ()
void	ISR_CPUVR_HOT ()
void	ISR_RMCA ()
	K_WORK_DELAYABLE_DEFINE (post_completework, post_complete_handler)
void	ISR_POST_COMPLETE (uint8_t gpio_value)
void	ISR_FM_ADR_MODE0 (uint8_t gpio_value)

Variables
add_vr_sel_info	vr_pwr_fault_work_item
const vr_pwr_fault_t	vr_pwr_fault_table []
const size_t	vr_pwr_fault_table_size = ARRAY_SIZE(vr_pwr_fault_table)
const cpld_vr_reg_t	cpld_vr_reg_table = { SB_CPLD_BUS, CPLD_ADDR, CPLD_VR_FAULT_REG }
struct vgpio_info	adr_mode0
struct vgpio_info	post_complete

Macro Definition Documentation

READ_PMIC_CRITICAL_ERROR_MS

#define READ_PMIC_CRITICAL_ERROR_MS   100

Function Documentation

init_vr_pwr_fault_work()

void init_vr_pwr_fault_work

(

)

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Initialize_CPU()

void Initialize_CPU

(

)

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ISR_BMC_PRDY()

void ISR_BMC_PRDY

(

)

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ISR_CATERR()

void ISR_CATERR

(

)

ISR_CPU_MEMHOT()

void ISR_CPU_MEMHOT

(

)

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ISR_CPUVR_HOT()

void ISR_CPUVR_HOT

(

)

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ISR_DBP_PRSNT()

void ISR_DBP_PRSNT

(

)

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ISR_FM_ADR_MODE0()

void ISR_FM_ADR_MODE0

(

uint8_t

gpio_value

)

ISR_HSC_OC()

void ISR_HSC_OC

(

)

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ISR_HSC_THROTTLE()

void ISR_HSC_THROTTLE

(

)

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ISR_MB_THROTTLE()

void ISR_MB_THROTTLE

(

)

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ISR_PLTRST()

void ISR_PLTRST

(

)

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ISR_POST_COMPLETE()

void ISR_POST_COMPLETE

(

uint8_t

gpio_value

)

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ISR_RMCA()

void ISR_RMCA

(

)

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ISR_SLP3()

void ISR_SLP3

(

)

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ISR_SOC_THMALTRIP()

void ISR_SOC_THMALTRIP

(

)

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ISR_SYS_THROTTLE()

void ISR_SYS_THROTTLE

(

)

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ISR_VR_PWR_FAULT()

void ISR_VR_PWR_FAULT

(

)

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K_WORK_DEFINE() [1/2]

K_WORK_DEFINE	(	clear_pmic_error_work	,
		clear_pmic_error
	)

K_WORK_DEFINE() [2/2]

K_WORK_DEFINE	(	cpu_memory_hot_work	,
		cpu_memory_hot_handler
	)

K_WORK_DELAYABLE_DEFINE() [1/8]

K_WORK_DELAYABLE_DEFINE	(	CAT_ERR_work	,
		CAT_ERR_handler
	)

K_WORK_DELAYABLE_DEFINE() [2/8]

K_WORK_DELAYABLE_DEFINE	(	mb_throttle_work	,
		mb_throttle_handler
	)

K_WORK_DELAYABLE_DEFINE() [3/8]

K_WORK_DELAYABLE_DEFINE	(	post_completework	,
		post_complete_handler
	)

K_WORK_DELAYABLE_DEFINE() [4/8]

K_WORK_DELAYABLE_DEFINE	(	PROC_FAIL_work	,
		PROC_FAIL_handler
	)

K_WORK_DELAYABLE_DEFINE() [5/8]

K_WORK_DELAYABLE_DEFINE	(	read_pmic_critical_work	,
		read_pmic_error_when_dc_off
	)

K_WORK_DELAYABLE_DEFINE() [6/8]

K_WORK_DELAYABLE_DEFINE	(	set_DC_off_10s_work	,
		set_DC_off_delayed_status
	)

K_WORK_DELAYABLE_DEFINE() [7/8]

K_WORK_DELAYABLE_DEFINE	(	set_DC_on_5s_work	,
		set_DC_on_delayed_status
	)

K_WORK_DELAYABLE_DEFINE() [8/8]

K_WORK_DELAYABLE_DEFINE	(	SLP3_work	,
		SLP3_handler
	)

LOG_MODULE_REGISTER()

LOG_MODULE_REGISTER

(

plat_isr

)

pal_skip_pmbus_cmd_code()

bool pal_skip_pmbus_cmd_code	(	uint8_t	vendor_type,
		uint8_t	cmd,
		uint8_t	page
	)

PWRGD_CPU_ACTIVE_HANDLE()

void PWRGD_CPU_ACTIVE_HANDLE

(

)

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send_gpio_interrupt()

void send_gpio_interrupt

(

uint8_t

gpio_num

)

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Set_DC_status()

void Set_DC_status

(

)

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Variable Documentation

adr_mode0

struct vgpio_info adr_mode0

cpld_vr_reg_table

const cpld_vr_reg_t cpld_vr_reg_table = { SB_CPLD_BUS, CPLD_ADDR, CPLD_VR_FAULT_REG }

post_complete

struct vgpio_info post_complete

vr_pwr_fault_table

const vr_pwr_fault_t vr_pwr_fault_table[]

Initial value:

= {
    { BIT(0), IPMI_EVENT_VR_PWR_FAULT_PVCCD1_HV, I2C_BUS5, PVCCD0_PVCCD1_ADDR, 1 },
    { BIT(1), IPMI_EVENT_VR_PWR_FAULT_PVCCD0_HV, I2C_BUS5, PVCCD0_PVCCD1_ADDR, 0 },
    { BIT(2), IPMI_EVENT_VR_PWR_FAULT_PVCCINF, I2C_BUS5, FIVRA_PVCCINF_ADDR, 1 },
    { BIT(3), IPMI_EVENT_VR_PWR_FAULT_VCCIN, I2C_BUS5, PVCCIN_EHV_ADDR, 0 },
    { BIT(4), IPMI_EVENT_VR_PWR_FAULT_PVCCFA_EHV_FIVRA, I2C_BUS5, FIVRA_PVCCINF_ADDR, 0 },
    { BIT(5), IPMI_EVENT_VR_PWR_FAULT_PVCCFA_EHV, I2C_BUS5, PVCCIN_EHV_ADDR, 1 },
}

vr_pwr_fault_table_size

const size_t vr_pwr_fault_table_size = ARRAY_SIZE(vr_pwr_fault_table)

vr_pwr_fault_work_item

add_vr_sel_info vr_pwr_fault_work_item