shell_iris_power.c File Reference

#include <stdlib.h>
#include <shell/shell.h>
#include "plat_cpld.h"
#include <logging/log.h>
#include <shell_plat_power_sequence.h>
#include "plat_gpio.h"
#include "plat_isr.h"
#include "plat_i2c.h"
#include "plat_ioexp.h"
#include "plat_pldm_sensor.h"
#include "plat_class.h"

Include dependency graph for shell_iris_power.c:

Classes
struct	power_good_status
struct	steps_on_struct
struct	pwr_clock_compnt_mapping
struct	ioe_power_good_status
struct	ioe_pwr_on

Macros
#define	enable   0x01
#define	disable   0x00
#define	NO_DEFINED   0xFF
#define	CLK_BUF_U85_ADDR   (0xCE >> 1)
#define	CLK_BUF_U87_ADDR   (0xD8 >> 1)
#define	CLK_BUF_U88_ADDR   (0xDE >> 1)
#define	CLK_GEN_100M_U86_ADDR   0x9
#define	CLK_BUF_100M_WRITE_LOCK_CLEAR_LOS_EVENT_OFFSET   0x27
#define	CLK_GEN_LOSMON_EVENT_OFFSET   0x5a
#define	CLK_BUF_100M_BYTE_COUNT   0x7
#define	MAX_STEPS   (sizeof(steps_on) / sizeof(steps_on[0]))

Typedefs
typedef struct power_good_status	power_good_status
typedef struct steps_on_struct	steps_on_struct
typedef struct pwr_clock_compnt_mapping	pwr_clock_compnt_mapping
typedef struct ioe_power_good_status	ioe_power_good_status
typedef struct ioe_pwr_on	ioe_pwr_on

Enumerations
enum	power_good_status_type_for_steps_on {   MODULE_PWRGD , PWRGD_P1V8_AUX , PWRGD_OWL_E_TRVDD0P9_R , PWRGD_OWL_W_TRVDD0P9_R ,   PWRGD_OWL_E_TRVDD0P75_R , PWRGD_OWL_W_TRVDD0P75_R , PWRGD_HAMSA_AVDD_PCIE_R , PWRGD_HAMSA_VDDHRXTX_PCIE_R ,   PWRGD_MEDHA1_VDD , PWRGD_MEDHA0_VDD , PWRGD_OWL_E_VDD_R , PWRGD_OWL_W_VDD_R ,   PWRGD_HAMSA_VDD_R , PWRGD_MAX_S_VDD_R , PWRGD_MAX_M_VDD_R , PWRGD_MAX_N_VDD_R ,   PWRGD_VDDQL_HBM0_HBM2_HBM4_HBM6_R , PWRGD_VDDQC_HBM0_HBM2_HBM4_HBM6_R , PWRGD_VPP_HBM0_HBM2_HBM4_HBM6_R , PWRGD_VDDPHY_HBM0_HBM2_HBM4_HBM6_R ,   PWRGD_VDDQL_HBM1_HBM3_HBM5_HBM7_R , PWRGD_VDDQC_HBM1_HBM3_HBM5_HBM7_R , PWRGD_VPP_HBM1_HBM3_HBM5_HBM7_R , PWRGD_VDDPHY_HBM1_HBM3_HBM5_HBM7_R ,   PWRGD_PLL_VDDA15_HBM0_HBM2 , PWRGD_PLL_VDDA15_HBM4_HBM6 , PWRGD_PLL_VDDA15_HBM1_HBM3 , PWRGD_PLL_VDDA15_HBM5_HBM7 ,   PWRGD_P0V9_OWL_E_PVDD , PWRGD_P0V9_OWL_W_PVDD , PWRGD_P1V5_E_RVDD , PWRGD_P1V5_W_RVDD ,   P12V_UBC1_PWRGD , P12V_UBC2_PWRGD , PWRGD_P5V_R , PWRGD_P3V3_R ,   PWRGD_P1V8_R , PWRGD_LDO_IN_1V2_R , PWRGD_P1V5_PLL_VDDA_OWL_E , PWRGD_P1V5_PLL_VDDA_SOC ,   PWRGD_PVDD1P5 , PWRGD_P0V75_AVDD_HCSL , PWRGD_P1V5_PLL_VDDA_OWL_W , PWRGD_P4V2 ,   PWRGD_MAX }
enum	PWR_CLOCK_COMPONENT {   CLK_BUF_100M_U85 , CLK_BUF_100M_U87 , CLK_BUF_100M_U88 , CLK_GEN_100M_U86 ,   CLK_COMPONENT_MAX }

Functions
	LOG_MODULE_REGISTER (shell_iris_power)
void	clear_clock_status (const struct shell *shell, uint8_t clock_index)
void	power_on_p3v3_osfp ()
void	power_off_p3v3_osfp (const struct shell *shell)
void	pwer_gd_get_status (const struct shell *shell)
void	steps_on_p3v3_osfp (const struct shell *shell)
void	pwr_get_clock_status (const struct shell *shell, uint8_t clock_index)
void	cmd_iris_power_on (const struct shell *shell, size_t argc, char **argv)
void	cmd_iris_power_off (const struct shell *shell, size_t argc, char **argv)
void	cmd_iris_power_cycle (const struct shell *shell, size_t argc, char **argv)
void	cmd_iris_steps_on (const struct shell *shell, size_t argc, char **argv)
void	cmd_iris_disable_steps_on (const struct shell *shell, size_t argc, char **argv)
	SHELL_STATIC_SUBCMD_SET_CREATE (sub_iris_power_cmd, SHELL_CMD(on, NULL, "iris power on", cmd_iris_power_on), SHELL_CMD(off, NULL, "iris power off", cmd_iris_power_off), SHELL_CMD(cycle, NULL, "iris power cycle", cmd_iris_power_cycle), SHELL_CMD(steps_on, NULL, "iris power steps_on", cmd_iris_steps_on), SHELL_CMD(disable_steps_on, NULL, "iris power disable steps_on", cmd_iris_disable_steps_on), SHELL_SUBCMD_SET_END)
	SHELL_CMD_REGISTER (iris_power, &sub_iris_power_cmd, "iris power commands", NULL)

Variables
power_good_status	power_good_status_table_for_steps_on []
pwr_clock_compnt_mapping	pwr_clock_compnt_mapping_table []
ioe_power_good_status	ioe_pwrgd_status_table []
ioe_pwr_on	ioe_pwr_on_table []
int	power_steps = 0

Macro Definition Documentation

CLK_BUF_100M_BYTE_COUNT

#define CLK_BUF_100M_BYTE_COUNT   0x7

CLK_BUF_100M_WRITE_LOCK_CLEAR_LOS_EVENT_OFFSET

#define CLK_BUF_100M_WRITE_LOCK_CLEAR_LOS_EVENT_OFFSET   0x27

CLK_BUF_U85_ADDR

#define CLK_BUF_U85_ADDR   (0xCE >> 1)

CLK_BUF_U87_ADDR

#define CLK_BUF_U87_ADDR   (0xD8 >> 1)

CLK_BUF_U88_ADDR

#define CLK_BUF_U88_ADDR   (0xDE >> 1)

CLK_GEN_100M_U86_ADDR

#define CLK_GEN_100M_U86_ADDR   0x9

CLK_GEN_LOSMON_EVENT_OFFSET

#define CLK_GEN_LOSMON_EVENT_OFFSET   0x5a

disable

#define disable   0x00

enable

#define enable   0x01

MAX_STEPS

#define MAX_STEPS   (sizeof(steps_on) / sizeof(steps_on[0]))

NO_DEFINED

#define NO_DEFINED   0xFF

Typedef Documentation

ioe_power_good_status

typedef struct ioe_power_good_status ioe_power_good_status

ioe_pwr_on

typedef struct ioe_pwr_on ioe_pwr_on

power_good_status

typedef struct power_good_status power_good_status

pwr_clock_compnt_mapping

typedef struct pwr_clock_compnt_mapping pwr_clock_compnt_mapping

steps_on_struct

typedef struct steps_on_struct steps_on_struct

Enumeration Type Documentation

power_good_status_type_for_steps_on

enum power_good_status_type_for_steps_on

Enumerator
MODULE_PWRGD
PWRGD_P1V8_AUX
PWRGD_OWL_E_TRVDD0P9_R
PWRGD_OWL_W_TRVDD0P9_R
PWRGD_OWL_E_TRVDD0P75_R
PWRGD_OWL_W_TRVDD0P75_R
PWRGD_HAMSA_AVDD_PCIE_R
PWRGD_HAMSA_VDDHRXTX_PCIE_R
PWRGD_MEDHA1_VDD
PWRGD_MEDHA0_VDD
PWRGD_OWL_E_VDD_R
PWRGD_OWL_W_VDD_R
PWRGD_HAMSA_VDD_R
PWRGD_MAX_S_VDD_R
PWRGD_MAX_M_VDD_R
PWRGD_MAX_N_VDD_R
PWRGD_VDDQL_HBM0_HBM2_HBM4_HBM6_R
PWRGD_VDDQC_HBM0_HBM2_HBM4_HBM6_R
PWRGD_VPP_HBM0_HBM2_HBM4_HBM6_R
PWRGD_VDDPHY_HBM0_HBM2_HBM4_HBM6_R
PWRGD_VDDQL_HBM1_HBM3_HBM5_HBM7_R
PWRGD_VDDQC_HBM1_HBM3_HBM5_HBM7_R
PWRGD_VPP_HBM1_HBM3_HBM5_HBM7_R
PWRGD_VDDPHY_HBM1_HBM3_HBM5_HBM7_R
PWRGD_PLL_VDDA15_HBM0_HBM2
PWRGD_PLL_VDDA15_HBM4_HBM6
PWRGD_PLL_VDDA15_HBM1_HBM3
PWRGD_PLL_VDDA15_HBM5_HBM7
PWRGD_P0V9_OWL_E_PVDD
PWRGD_P0V9_OWL_W_PVDD
PWRGD_P1V5_E_RVDD
PWRGD_P1V5_W_RVDD
P12V_UBC1_PWRGD
P12V_UBC2_PWRGD
PWRGD_P5V_R
PWRGD_P3V3_R
PWRGD_P1V8_R
PWRGD_LDO_IN_1V2_R
PWRGD_P1V5_PLL_VDDA_OWL_E
PWRGD_P1V5_PLL_VDDA_SOC
PWRGD_PVDD1P5
PWRGD_P0V75_AVDD_HCSL
PWRGD_P1V5_PLL_VDDA_OWL_W
PWRGD_P4V2
PWRGD_MAX

PWR_CLOCK_COMPONENT

enum PWR_CLOCK_COMPONENT

Enumerator
CLK_BUF_100M_U85
CLK_BUF_100M_U87
CLK_BUF_100M_U88
CLK_GEN_100M_U86
CLK_COMPONENT_MAX

Function Documentation

clear_clock_status()

void clear_clock_status	(	const struct shell *	shell,
		uint8_t	clock_index
	)

Here is the call graph for this function:

cmd_iris_disable_steps_on()

void cmd_iris_disable_steps_on	(	const struct shell *	shell,
		size_t	argc,
		char **	argv
	)

Here is the call graph for this function:

cmd_iris_power_cycle()

void cmd_iris_power_cycle	(	const struct shell *	shell,
		size_t	argc,
		char **	argv
	)

cmd_iris_power_off()

void cmd_iris_power_off	(	const struct shell *	shell,
		size_t	argc,
		char **	argv
	)

cmd_iris_power_on()

void cmd_iris_power_on	(	const struct shell *	shell,
		size_t	argc,
		char **	argv
	)

cmd_iris_steps_on()

void cmd_iris_steps_on	(	const struct shell *	shell,
		size_t	argc,
		char **	argv
	)

Here is the call graph for this function:

LOG_MODULE_REGISTER()

LOG_MODULE_REGISTER

(

shell_iris_power

)

power_off_p3v3_osfp()

void power_off_p3v3_osfp

(

const struct shell *

shell

)

Here is the call graph for this function:

power_on_p3v3_osfp()

void power_on_p3v3_osfp

(

)

Here is the call graph for this function:

pwer_gd_get_status()

void pwer_gd_get_status

(

const struct shell *

shell

)

Here is the call graph for this function:

pwr_get_clock_status()

void pwr_get_clock_status	(	const struct shell *	shell,
		uint8_t	clock_index
	)

Here is the call graph for this function:

SHELL_CMD_REGISTER()

SHELL_CMD_REGISTER	(	iris_power	,
		&	sub_iris_power_cmd,
		"iris power commands"	,
		NULL
	)

SHELL_STATIC_SUBCMD_SET_CREATE()

SHELL_STATIC_SUBCMD_SET_CREATE	(	sub_iris_power_cmd	,
		SHELL_CMD(on, NULL, "iris power on", cmd_iris_power_on)	,
		SHELL_CMD(off, NULL, "iris power off", cmd_iris_power_off)	,
		SHELL_CMD(cycle, NULL, "iris power cycle", cmd_iris_power_cycle)	,
		SHELL_CMD(steps_on, NULL, "iris power steps_on", cmd_iris_steps_on)	,
		SHELL_CMD(disable_steps_on, NULL, "iris power disable steps_on", cmd_iris_disable_steps_on)	,
		SHELL_SUBCMD_SET_END
	)

steps_on_p3v3_osfp()

void steps_on_p3v3_osfp

(

const struct shell *

shell

)

Here is the call graph for this function:

Variable Documentation

ioe_pwr_on_table

ioe_pwr_on ioe_pwr_on_table[]

Initial value:

= {
    { U200051_IO_I2C_BUS, U200051_IO_ADDR, 0, "FM_P3V3_OSFP_P1_EN" },
    { U200051_IO_I2C_BUS, U200051_IO_ADDR, 1, "FM_P3V3_OSFP_P2_EN" },
    { U200051_IO_I2C_BUS, U200051_IO_ADDR, 2, "FM_P3V3_OSFP_P3_EN" },
    { U200051_IO_I2C_BUS, U200051_IO_ADDR, 3, "FM_P3V3_OSFP_P4_EN" },
    { U200051_IO_I2C_BUS, U200051_IO_ADDR, 4, "FM_P3V3_OSFP_P5_EN" },
    { U200051_IO_I2C_BUS, U200051_IO_ADDR, 5, "FM_P3V3_OSFP_P6_EN" },
}

ioe_pwrgd_status_table

ioe_power_good_status ioe_pwrgd_status_table[]

Initial value:

= {
    { U200052_IO_I2C_BUS, U200052_IO_ADDR, 0, "PWRGD_P3V3_OSFP_P1" },
    { U200052_IO_I2C_BUS, U200052_IO_ADDR, 1, "PWRGD_P3V3_OSFP_P2" },
    { U200052_IO_I2C_BUS, U200052_IO_ADDR, 2, "PWRGD_P3V3_OSFP_P3" },
    { U200052_IO_I2C_BUS, U200052_IO_ADDR, 3, "PWRGD_P3V3_OSFP_P4" },
    { U200052_IO_I2C_BUS, U200052_IO_ADDR, 4, "PWRGD_P3V3_OSFP_P5" },
    { U200052_IO_I2C_BUS, U200052_IO_ADDR, 5, "PWRGD_P3V3_OSFP_P6" },
}

power_good_status_table_for_steps_on

power_good_status power_good_status_table_for_steps_on[]

power_steps

int power_steps = 0

pwr_clock_compnt_mapping_table

pwr_clock_compnt_mapping pwr_clock_compnt_mapping_table[]

Initial value:

= {
    { CLK_BUF_100M_U85, CLK_BUF_U85_ADDR, I2C_BUS1, "LOS_EVT_CLK_BUF_100M_U85" },
    { CLK_BUF_100M_U87, CLK_BUF_U87_ADDR, I2C_BUS1, "LOS_EVT_CLK_BUF_100M_U87" },
    { CLK_BUF_100M_U88, CLK_BUF_U88_ADDR, I2C_BUS3, "LOS_EVT_CLK_BUF_100M_U88" },
    { CLK_GEN_100M_U86, CLK_GEN_100M_U86_ADDR, I2C_BUS3, "LOS_EVT_CLK_GEN_100M_U86" },
}