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OpenBIC
OpenSource Bridge-IC
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#include <zephyr.h>#include <stdio.h>#include <stdlib.h>#include <logging/log.h>#include "plat_gpio.h"#include "plat_cpld.h"#include "plat_log.h"#include "plat_event.h"#include "plat_ioexp.h"#include "plat_hook.h"#include "plat_iris_smbus.h"#include "plat_util.h"#include "plat_i2c.h"#include "shell_iris_power.h"#include "plat_class.h"#include "plat_vr_test_mode.h"#include "plat_power_capping.h"#include "plat_hwmon.h"#include "shell_plat_power_sequence.h"#include "plat_user_setting.h"
Macros | |
| #define | NPCM4XX_SCFG_BASE DT_REG_ADDR_BY_NAME(DT_NODELABEL(scfg), scfg) |
| #define | NPCM4XX_DEVALTC 0x1C |
| #define | NPCM4XX_SPIP1_SEL 1 /* DEVALTC bit1: 0=GPIO73, 1=SPIP1_CS */ |
| #define | NPCM4XX_GPIO7_BASE (REG_GPIO_BASE + 0xE000) /* GPIO_7 register base */ |
| #define | NPCM4XX_GPIO7_PDOUT 0x00 /* Port data output offset */ |
| #define | NPCM4XX_GPIO7_PDIR 0x02 /* Port direction offset */ |
| #define | NPCM4XX_GPIO73_BIT 3 /* GPIO73 = port-7 bit-3 */ |
Functions | |
| LOG_MODULE_REGISTER (plat_isr) | |
| void | pwr_sequence_event_timer_handler (struct k_timer *timer) |
| K_TIMER_DEFINE (pwr_sequence_event_work_timer, pwr_sequence_event_timer_handler, NULL) | |
| void | pwr_sequence_event (struct k_work *work) |
| K_WORK_DEFINE (pwr_sequence_event_work, pwr_sequence_event) | |
| void | set_pwr_steps_on_flag (uint8_t flag_value) |
| uint8_t | get_pwr_steps_on_flag (void) |
| void | ISR_GPIO_ALL_VR_PM_ALERT_R_N () |
| void | ISR_GPIO_FM_PLD_UBC_EN_R () |
| void | plat_switch_pin_a12 (bool use_gpio73) |
| void | ISR_GPIO_RST_IRIS_PWR_ON_PLD_R1_N () |
| void | ISR_GPIO_SMB_HAMSA_MMC_LVC33_ALERT_N () |
| void | ISR_ASIC_THERMTRIP_TRIGGER () |
| bool | plat_gpio_immediate_int_cb (uint8_t gpio_num) |
Variables | |
| uint8_t | pwr_steps_on_flag = 0 |
| #define NPCM4XX_DEVALTC 0x1C |
| #define NPCM4XX_GPIO73_BIT 3 /* GPIO73 = port-7 bit-3 */ |
| #define NPCM4XX_GPIO7_BASE (REG_GPIO_BASE + 0xE000) /* GPIO_7 register base */ |
| #define NPCM4XX_GPIO7_PDIR 0x02 /* Port direction offset */ |
| #define NPCM4XX_SCFG_BASE DT_REG_ADDR_BY_NAME(DT_NODELABEL(scfg), scfg) |
| #define NPCM4XX_SPIP1_SEL 1 /* DEVALTC bit1: 0=GPIO73, 1=SPIP1_CS */ |
| uint8_t get_pwr_steps_on_flag | ( | void | ) |
| void ISR_ASIC_THERMTRIP_TRIGGER | ( | ) |

| void ISR_GPIO_ALL_VR_PM_ALERT_R_N | ( | ) |

| void ISR_GPIO_FM_PLD_UBC_EN_R | ( | ) |

| void ISR_GPIO_RST_IRIS_PWR_ON_PLD_R1_N | ( | ) |

| void ISR_GPIO_SMB_HAMSA_MMC_LVC33_ALERT_N | ( | ) |

| K_TIMER_DEFINE | ( | pwr_sequence_event_work_timer | , |
| pwr_sequence_event_timer_handler | , | ||
| NULL | |||
| ) |
| K_WORK_DEFINE | ( | pwr_sequence_event_work | , |
| pwr_sequence_event | |||
| ) |
| LOG_MODULE_REGISTER | ( | plat_isr | ) |
| bool plat_gpio_immediate_int_cb | ( | uint8_t | gpio_num | ) |
| void plat_switch_pin_a12 | ( | bool | use_gpio73 | ) |
| void pwr_sequence_event | ( | struct k_work * | work | ) |

| void pwr_sequence_event_timer_handler | ( | struct k_timer * | timer | ) |
| void set_pwr_steps_on_flag | ( | uint8_t | flag_value | ) |
| uint8_t pwr_steps_on_flag = 0 |