OpenBIC
OpenSource Bridge-IC
plat_iris_smbus.h
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1/*
2 * Copyright (c) Meta Platforms, Inc. and affiliates.
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17#ifndef PLAT_IRIS_SMBUS_H
18#define PLAT_IRIS_SMBUS_H
19
20/*
21 * smbus sideband operating modes
22 */
23#define FASTBOOT_MODE BIT(0)
24#define CMRT_SIC_MODE BIT(1)
25#define RECOVERY_MODE BIT(2)
26
27#define BYTE_MASK 0xff
28
29// Hamsa boot1 binary at 0x94008000
30#define HAMSA_BOOT1_ASIC_MEM_ADDR 0x94008000
31#define HAMSA_BOOT1_ADDR 0x32 //0x32(7-bit)
32
33// smbus2.0 spec restrict max bytes in an atomic transfer to 32
34#define SMBUS_MAX_PKT_LEN 32
35// maximum data payload excluding metadata(cmd, len and addr) overheads
36#define SMBUS_MAX_PAYLOAD_LEN 24
37
38#define MSG_PKT_LEN_OFFSET 0
39#define MSG_ADDR_OFFSET 1
40#define ADDRESS_BYTE_SZ 4
41#define DATA_LEN_BYTE_SZ 1
42#define MSG_DATA_LEN_OFFSET 5
43#define MSG_RDWR_DATA_START 6
44#define BYTES_PER_WORD 4
45#define PKT_LEN_BYTE_SZ 1
46
47#define ADDR_DATA_LEN_SZ (ADDRESS_BYTE_SZ + DATA_LEN_BYTE_SZ)
48// FW download
49#define MAX_RETRIES 3
50// fw download status/control bytes
51#define FW_DL_START BIT(7)
52#define FW_DL_SLV_RDY BIT(6)
53#define FW_DL_HST_ABRT BIT(5)
54#define FW_DL_SLV_ABRTD BIT(4)
55#define FW_DL_FINISH BIT(3)
56#define FW_DL_SLV_DONE BIT(2)
57#define FW_DL_SLV_PROG BIT(1)
58#define FW_SB_EXIT_CMD BIT(0)
59
60#define MEDHA0_I2C_ADDR 0x33
61#define MEDHA1_I2C_ADDR 0x34
62#define OWLW_I2C_ADDR 0x6E
63#define OWLE_I2C_ADDR 0x6E
64
65#define MAX_DATA_PKT_SIZE 24
66#define STATUS_RETRY_CNT 2
67#define ERROR_CODE_LEN 8
68
69// smbus error code
70#define SMBUS_ERROR 122
71// asic_error_code
72#define ASIC_ERROR 123
73// module_error_code
74#define MODULE_ERROR 124
75// smbus/firmware protocol error
76#define FW_SMBUS_ERROR 130
77// custom device error report
78#define SB_MODE_QUERY 135
79// fw download control write
80#define FW_CTRL_WRITE 136
81// fw download control read
82#define FW_CTRL_READ 137
83// firmware block write
84#define FW_DATA_WRITE 138
85
86int iris_smbus_fast_boot(uint8_t *image_buff, uint32_t img_dest_addr, uint32_t img_size);
87#endif
int iris_smbus_fast_boot(uint8_t *image_buff, uint32_t img_dest_addr, uint32_t img_size)