plat_iris_smbus.h File Reference

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Macros
#define	FASTBOOT_MODE   BIT(0)
#define	CMRT_SIC_MODE   BIT(1)
#define	RECOVERY_MODE   BIT(2)
#define	BYTE_MASK   0xff
#define	HAMSA_BOOT1_ASIC_MEM_ADDR   0x94008000
#define	HAMSA_BOOT1_ADDR   0x32
#define	SMBUS_MAX_PKT_LEN   32
#define	SMBUS_MAX_PAYLOAD_LEN   24
#define	MSG_PKT_LEN_OFFSET   0
#define	MSG_ADDR_OFFSET   1
#define	ADDRESS_BYTE_SZ   4
#define	DATA_LEN_BYTE_SZ   1
#define	MSG_DATA_LEN_OFFSET   5
#define	MSG_RDWR_DATA_START   6
#define	BYTES_PER_WORD   4
#define	PKT_LEN_BYTE_SZ   1
#define	ADDR_DATA_LEN_SZ   (ADDRESS_BYTE_SZ + DATA_LEN_BYTE_SZ)
#define	MAX_RETRIES   3
#define	FW_DL_START   BIT(7)
#define	FW_DL_SLV_RDY   BIT(6)
#define	FW_DL_HST_ABRT   BIT(5)
#define	FW_DL_SLV_ABRTD   BIT(4)
#define	FW_DL_FINISH   BIT(3)
#define	FW_DL_SLV_DONE   BIT(2)
#define	FW_DL_SLV_PROG   BIT(1)
#define	FW_SB_EXIT_CMD   BIT(0)
#define	MEDHA0_I2C_ADDR   0x33
#define	MEDHA1_I2C_ADDR   0x34
#define	OWLW_I2C_ADDR   0x6E
#define	OWLE_I2C_ADDR   0x6E
#define	MAX_DATA_PKT_SIZE   24
#define	STATUS_RETRY_CNT   2
#define	ERROR_CODE_LEN   8
#define	SMBUS_ERROR   122
#define	ASIC_ERROR   123
#define	MODULE_ERROR   124
#define	FW_SMBUS_ERROR   130
#define	SB_MODE_QUERY   135
#define	FW_CTRL_WRITE   136
#define	FW_CTRL_READ   137
#define	FW_DATA_WRITE   138

Functions
int	iris_smbus_fast_boot (uint8_t *image_buff, uint32_t img_dest_addr, uint32_t img_size)

Macro Definition Documentation

ADDR_DATA_LEN_SZ

#define ADDR_DATA_LEN_SZ   (ADDRESS_BYTE_SZ + DATA_LEN_BYTE_SZ)

ADDRESS_BYTE_SZ

#define ADDRESS_BYTE_SZ   4

ASIC_ERROR

#define ASIC_ERROR   123

BYTE_MASK

#define BYTE_MASK   0xff

BYTES_PER_WORD

#define BYTES_PER_WORD   4

CMRT_SIC_MODE

#define CMRT_SIC_MODE   BIT(1)

DATA_LEN_BYTE_SZ

#define DATA_LEN_BYTE_SZ   1

ERROR_CODE_LEN

#define ERROR_CODE_LEN   8

FASTBOOT_MODE

#define FASTBOOT_MODE   BIT(0)

FW_CTRL_READ

#define FW_CTRL_READ   137

FW_CTRL_WRITE

#define FW_CTRL_WRITE   136

FW_DATA_WRITE

#define FW_DATA_WRITE   138

FW_DL_FINISH

#define FW_DL_FINISH   BIT(3)

FW_DL_HST_ABRT

#define FW_DL_HST_ABRT   BIT(5)

FW_DL_SLV_ABRTD

#define FW_DL_SLV_ABRTD   BIT(4)

FW_DL_SLV_DONE

#define FW_DL_SLV_DONE   BIT(2)

FW_DL_SLV_PROG

#define FW_DL_SLV_PROG   BIT(1)

FW_DL_SLV_RDY

#define FW_DL_SLV_RDY   BIT(6)

FW_DL_START

#define FW_DL_START   BIT(7)

FW_SB_EXIT_CMD

#define FW_SB_EXIT_CMD   BIT(0)

FW_SMBUS_ERROR

#define FW_SMBUS_ERROR   130

HAMSA_BOOT1_ADDR

#define HAMSA_BOOT1_ADDR   0x32

HAMSA_BOOT1_ASIC_MEM_ADDR

#define HAMSA_BOOT1_ASIC_MEM_ADDR   0x94008000

MAX_DATA_PKT_SIZE

#define MAX_DATA_PKT_SIZE   24

MAX_RETRIES

#define MAX_RETRIES   3

MEDHA0_I2C_ADDR

#define MEDHA0_I2C_ADDR   0x33

MEDHA1_I2C_ADDR

#define MEDHA1_I2C_ADDR   0x34

MODULE_ERROR

#define MODULE_ERROR   124

MSG_ADDR_OFFSET

#define MSG_ADDR_OFFSET   1

MSG_DATA_LEN_OFFSET

#define MSG_DATA_LEN_OFFSET   5

MSG_PKT_LEN_OFFSET

#define MSG_PKT_LEN_OFFSET   0

MSG_RDWR_DATA_START

#define MSG_RDWR_DATA_START   6

OWLE_I2C_ADDR

#define OWLE_I2C_ADDR   0x6E

OWLW_I2C_ADDR

#define OWLW_I2C_ADDR   0x6E

PKT_LEN_BYTE_SZ

#define PKT_LEN_BYTE_SZ   1

RECOVERY_MODE

#define RECOVERY_MODE   BIT(2)

SB_MODE_QUERY

#define SB_MODE_QUERY   135

SMBUS_ERROR

#define SMBUS_ERROR   122

SMBUS_MAX_PAYLOAD_LEN

#define SMBUS_MAX_PAYLOAD_LEN   24

SMBUS_MAX_PKT_LEN

#define SMBUS_MAX_PKT_LEN   32

STATUS_RETRY_CNT

#define STATUS_RETRY_CNT   2

Function Documentation

iris_smbus_fast_boot()

int iris_smbus_fast_boot	(	uint8_t *	image_buff,
		uint32_t	img_dest_addr,
		uint32_t	img_size
	)