21#include <shell/shell.h>
37#define MAX_PWR_ON_RECORD 10
38#define MAX_PWR_OFF_RECORD 10
40enum SHELL_POWER_ON_STAGE {
41 SHELL_BOARD_POWER_ON_STAGE0 = 0x00,
42 SHELL_BOARD_POWER_ON_STAGE1,
43 SHELL_BOARD_POWER_ON_STAGE2,
44 SHELL_RETIMER_POWER_ON_STAGE0,
45 SHELL_RETIMER_POWER_ON_STAGE1,
46 SHELL_RETIMER_POWER_ON_STAGE2,
47 SHELL_E1S_POWER_ON_STAGE0,
48 SHELL_E1S_POWER_ON_STAGE1,
49 SHELL_E1S_POWER_ON_STAGE2,
50 SHELL_E1S_POWER_ON_STAGE3,
51 SHELL_POWER_ON_NONE = 0xFF,
54enum SHELL_POWER_OFF_STAGE {
55 SHELL_E1S_POWER_OFF_STAGE0 = 0x00,
56 SHELL_E1S_POWER_OFF_STAGE1,
57 SHELL_E1S_POWER_OFF_STAGE2,
58 SHELL_E1S_POWER_OFF_STAGE3,
59 SHELL_RETIMER_POWER_OFF_STAGE0,
60 SHELL_RETIMER_POWER_OFF_STAGE1,
61 SHELL_RETIMER_POWER_OFF_STAGE2,
62 SHELL_BOARD_POWER_OFF_STAGE0,
63 SHELL_BOARD_POWER_OFF_STAGE1,
64 SHELL_BOARD_POWER_OFF_STAGE2,
65 SHELL_POWER_OFF_NONE = 0xFF,
72void power_on_sequence_check(
const struct shell *shell, uint8_t stage);
73void power_off_sequence_check(
const struct shell *shell, uint8_t stage);
84 SHELL_CMD(sequence, NULL,
"Power Sequence status",
87 SHELL_SUBCMD_SET_END);
uint8_t status
Definition: mctp_ctrl.h:1
int cmd_power_sequence(const struct shell *shell, size_t argc, char **argv)
Definition: plat_power_sequence_shell.c:57
device_id
Definition: power_shell.h:29
@ DEVICE_BMC
Definition: power_shell.h:31
@ MAX_DEVICE_COUNT
Definition: power_shell.h:32
@ DEVICE_HOST
Definition: power_shell.h:30
SHELL_STATIC_SUBCMD_SET_CREATE(sub_power_cmds, SHELL_CMD(status, NULL, "List power status", cmd_power_status), SHELL_CMD(control, NULL, "Power control", cmd_power_control), SHELL_SUBCMD_SET_END)
void cmd_power_status(const struct shell *shell, size_t argc, char **argv)
Definition: power_shell.c:51
void cmd_power_control(const struct shell *shell, size_t argc, char **argv)
Definition: power_shell.c:86
Definition: power_shell.h:24
char * name
Definition: power_shell.h:26
uint8_t enable
Definition: power_shell.h:25