OpenBIC
OpenSource Bridge-IC
plat_isr.c File Reference
#include "plat_isr.h"
#include <logging/log.h>
#include "libipmi.h"
#include "kcs.h"
#include "power_status.h"
#include <pmbus.h>
#include "sensor.h"
#include "snoop.h"
#include "plat_gpio.h"
#include "plat_class.h"
#include "plat_ipmi.h"
#include "plat_sensor_table.h"
#include "plat_i2c.h"
#include "plat_pmic.h"
#include "oem_1s_handler.h"
#include "hal_gpio.h"
#include "hal_i2c.h"
#include "util_sys.h"
#include "util_worker.h"
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Macros

#define DETECT_VR_WDT_DELAY_S   10
 
#define DC_ON_5_SECOND   5
 
#define VR_EVENT_DELAY_MS   10
 
#define PROC_FAIL_START_DELAY_SECOND   10
 
#define CATERR_START_DELAY_SECOND   2
 
#define MB_THROTTLE_DELAY_US   4
 
#define SYS_THROTTLE_DELAY_MS   1
 

Functions

 LOG_MODULE_REGISTER (plat_isr)
 
void send_gpio_interrupt (uint8_t gpio_num)
 
 K_WORK_DELAYABLE_DEFINE (SLP3_work, SLP3_handler)
 
void ISR_SLP3 ()
 
void ISR_POST_COMPLETE ()
 
 K_WORK_DELAYABLE_DEFINE (set_DC_on_5s_work, set_DC_on_delayed_status)
 
void ISR_DC_ON ()
 
void ISR_BMC_PRDY ()
 
 K_WORK_DELAYABLE_DEFINE (PROC_FAIL_work, PROC_FAIL_handler)
 
void ISR_PWRGD_CPU ()
 
 K_WORK_DELAYABLE_DEFINE (CAT_ERR_work, CAT_ERR_handler)
 
void ISR_CATERR ()
 
void ISR_PLTRST ()
 
void ISR_DBP_PRSNT ()
 
void ISR_FM_THROTTLE ()
 
void ISR_HSC_THROTTLE ()
 
 K_WORK_DELAYABLE_DEFINE (mb_throttle_work, mb_throttle_handler)
 
void ISR_MB_THROTTLE ()
 
void ISR_SOC_THMALTRIP ()
 
 K_WORK_DELAYABLE_DEFINE (sys_throttle_work, sys_throttle_handler)
 
void ISR_SYS_THROTTLE ()
 
void ISR_PCH_THMALTRIP ()
 
void ISR_HSC_OC ()
 
void ISR_CPU_MEMHOT ()
 
void ISR_CPUVR_HOT ()
 
void ISR_PCH_PWRGD ()
 
void ISR_RMCA ()
 
void ISR_NMI ()
 
void smi_handler ()
 
 K_WORK_DELAYABLE_DEFINE (smi_work, smi_handler)
 
void ISR_SMI (void)
 
void ISR_E1S_0_INA233_ALRT (void)
 
void ISR_SMB_SENSOR_LVC3_ALERT (void)
 
void process_vr_power_fault_sel (struct k_work *work_item)
 
void init_vr_event_work ()
 
void ISR_VR_PWR_FAULT ()
 

Variables

add_vr_sel_info vr_event_work_item []
 
const vr_fault_info vr_fault_table []
 
const cpld_reg_info cpld_reg_table [CPLD_REG_INFO_IDX_MAX]
 
const uint8_t vr_reg_list [][9]
 

Macro Definition Documentation

◆ CATERR_START_DELAY_SECOND

#define CATERR_START_DELAY_SECOND   2

◆ DC_ON_5_SECOND

#define DC_ON_5_SECOND   5

◆ DETECT_VR_WDT_DELAY_S

#define DETECT_VR_WDT_DELAY_S   10

◆ MB_THROTTLE_DELAY_US

#define MB_THROTTLE_DELAY_US   4

◆ PROC_FAIL_START_DELAY_SECOND

#define PROC_FAIL_START_DELAY_SECOND   10

◆ SYS_THROTTLE_DELAY_MS

#define SYS_THROTTLE_DELAY_MS   1

◆ VR_EVENT_DELAY_MS

#define VR_EVENT_DELAY_MS   10

Function Documentation

◆ init_vr_event_work()

void init_vr_event_work ( )
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◆ ISR_BMC_PRDY()

void ISR_BMC_PRDY ( )
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◆ ISR_CATERR()

void ISR_CATERR ( )

◆ ISR_CPU_MEMHOT()

void ISR_CPU_MEMHOT ( )
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◆ ISR_CPUVR_HOT()

void ISR_CPUVR_HOT ( )
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◆ ISR_DBP_PRSNT()

void ISR_DBP_PRSNT ( )
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◆ ISR_DC_ON()

void ISR_DC_ON ( )
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◆ ISR_E1S_0_INA233_ALRT()

void ISR_E1S_0_INA233_ALRT ( void  )
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◆ ISR_FM_THROTTLE()

void ISR_FM_THROTTLE ( )
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◆ ISR_HSC_OC()

void ISR_HSC_OC ( )
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◆ ISR_HSC_THROTTLE()

void ISR_HSC_THROTTLE ( )
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◆ ISR_MB_THROTTLE()

void ISR_MB_THROTTLE ( )
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◆ ISR_NMI()

void ISR_NMI ( )
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◆ ISR_PCH_PWRGD()

void ISR_PCH_PWRGD ( )
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◆ ISR_PCH_THMALTRIP()

void ISR_PCH_THMALTRIP ( )
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◆ ISR_PLTRST()

void ISR_PLTRST ( )
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◆ ISR_POST_COMPLETE()

void ISR_POST_COMPLETE ( )
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◆ ISR_PWRGD_CPU()

void ISR_PWRGD_CPU ( )
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◆ ISR_RMCA()

void ISR_RMCA ( )
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◆ ISR_SLP3()

void ISR_SLP3 ( )
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◆ ISR_SMB_SENSOR_LVC3_ALERT()

void ISR_SMB_SENSOR_LVC3_ALERT ( void  )
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◆ ISR_SMI()

void ISR_SMI ( void  )
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◆ ISR_SOC_THMALTRIP()

void ISR_SOC_THMALTRIP ( )
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◆ ISR_SYS_THROTTLE()

void ISR_SYS_THROTTLE ( )

◆ ISR_VR_PWR_FAULT()

void ISR_VR_PWR_FAULT ( )
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◆ K_WORK_DELAYABLE_DEFINE() [1/7]

K_WORK_DELAYABLE_DEFINE ( CAT_ERR_work  ,
CAT_ERR_handler   
)

◆ K_WORK_DELAYABLE_DEFINE() [2/7]

K_WORK_DELAYABLE_DEFINE ( mb_throttle_work  ,
mb_throttle_handler   
)

◆ K_WORK_DELAYABLE_DEFINE() [3/7]

K_WORK_DELAYABLE_DEFINE ( PROC_FAIL_work  ,
PROC_FAIL_handler   
)

◆ K_WORK_DELAYABLE_DEFINE() [4/7]

K_WORK_DELAYABLE_DEFINE ( set_DC_on_5s_work  ,
set_DC_on_delayed_status   
)

◆ K_WORK_DELAYABLE_DEFINE() [5/7]

K_WORK_DELAYABLE_DEFINE ( SLP3_work  ,
SLP3_handler   
)

◆ K_WORK_DELAYABLE_DEFINE() [6/7]

K_WORK_DELAYABLE_DEFINE ( smi_work  ,
smi_handler   
)

◆ K_WORK_DELAYABLE_DEFINE() [7/7]

K_WORK_DELAYABLE_DEFINE ( sys_throttle_work  ,
sys_throttle_handler   
)

◆ LOG_MODULE_REGISTER()

LOG_MODULE_REGISTER ( plat_isr  )

◆ process_vr_power_fault_sel()

void process_vr_power_fault_sel ( struct k_work *  work_item)
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◆ send_gpio_interrupt()

void send_gpio_interrupt ( uint8_t  gpio_num)
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◆ smi_handler()

void smi_handler ( )
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Variable Documentation

◆ cpld_reg_table

const cpld_reg_info cpld_reg_table[CPLD_REG_INFO_IDX_MAX]
Initial value:
= {
{ I2C_BUS1, CPLD_ADDR, 0x0A },
{ I2C_BUS1, CPLD_ADDR, 0x03 },
}
#define I2C_BUS1
Definition: plat_i2c.h:24
#define CPLD_ADDR
Definition: plat_class.h:34

◆ vr_event_work_item

add_vr_sel_info vr_event_work_item[]
Initial value:
= {
{
.is_init = false,
.gpio_num = FM_FORCE_ADR_N_R,
},
}
#define FM_FORCE_ADR_N_R
Definition: plat_gpio.h:258

◆ vr_fault_table

const vr_fault_info vr_fault_table[]
Initial value:
= {
1 },
{ P1V05_PCH_STB, CPLD_REG_INFO_IDX_1, BIT(2), false, 0, 0, 0 },
{ P1V8_STBY, CPLD_REG_INFO_IDX_1, BIT(4), false, 0, 0, 0 },
{ P5V_STBY, CPLD_REG_INFO_IDX_1, BIT(3), false, 0, 0, 0 },
{ P3V3_STBY, CPLD_REG_INFO_IDX_1, BIT(5), false, 0, 0, 0 },
{ VR_P12V_E1S_0, CPLD_REG_INFO_IDX_1, BIT(6), false, 0, 0, 0 },
{ VR_P3V3_E1S_0, CPLD_REG_INFO_IDX_1, BIT(7), false, 0, 0, 0 },
}
#define I2C_BUS5
Definition: plat_i2c.h:28
@ P5V_STBY
Definition: plat_isr.h:47
@ P3V3_STBY
Definition: plat_isr.h:48
@ PVCCFA_EHV_FIVRA_CPU0
Definition: plat_isr.h:41
@ P1V8_STBY
Definition: plat_isr.h:46
@ PVCCD_HV_CPU
Definition: plat_isr.h:44
@ PVCCFA_EHV_CPU0
Definition: plat_isr.h:43
@ VR_P12V_E1S_0
Definition: plat_isr.h:49
@ P1V05_PCH_STB
Definition: plat_isr.h:45
@ VR_P3V3_E1S_0
Definition: plat_isr.h:50
@ PVCCINFAON_CPU0
Definition: plat_isr.h:42
@ PVCCIN_CPU0
Definition: plat_isr.h:40
@ CPLD_REG_INFO_IDX_1
Definition: plat_isr.h:37
@ CPLD_REG_INFO_IDX_0
Definition: plat_isr.h:37
#define PVCCIN_ADDR
Definition: plat_sensor_table.h:41
#define PVCCFA_EHV_FIVRA_ADDR
Definition: plat_sensor_table.h:42
#define PVCCFA_EHV_ADDR
Definition: plat_sensor_table.h:40
#define PVCCD_HV_ADDR
Definition: plat_sensor_table.h:38
#define PVCCINFAON_ADDR
Definition: plat_sensor_table.h:39

◆ vr_reg_list

const uint8_t vr_reg_list[][9]
Initial value:
= {
}
@ PMBUS_STATUS_WORD
Definition: pmbus.h:102
@ PMBUS_STATUS_IOUT
Definition: pmbus.h:104
@ PMBUS_STATUS_MFR_SPECIFIC
Definition: pmbus.h:109
@ PMBUS_STATUS_BYTE
Definition: pmbus.h:101
@ PMBUS_STATUS_CML
Definition: pmbus.h:107
@ PMBUS_STATUS_OTHER
Definition: pmbus.h:108
@ PMBUS_STATUS_TEMPERATURE
Definition: pmbus.h:106
@ PMBUS_STATUS_VOUT
Definition: pmbus.h:103
@ PMBUS_STATUS_INPUT
Definition: pmbus.h:105