#include "plat_i2c.h"
#include "i2c-mux-pca984x.h"

Include dependency graph for plat_fru.h:

This graph shows which files directly or indirectly include this file:

Macros
#define	MC_FRU_PORT I2C_BUS1

#define	MC_FRU_ADDR (0xA0 >> 1)

#define	CXL_FRU_PORT I2C_BUS2

#define	CXL_FRU_ADDR (0xA8 >> 1)

#define	CXL_FRU_MUX0_ADDR (0xE0 >> 1)

#define	CXL_FRU_MUX1_ADDR (0xE2 >> 1)

#define	CXL_FRU_MUX1_CHANNEL 2

#define	FRU_CFG_NUM 10

#define	BIC_FRU_DEV_ID MC_FRU_ID

Enumerations
enum	FRU_ID { MB_FRU_ID = 0x00 , BB_FRU_ID , BPB_FRU_ID , PDB_FRU_ID , SB_FRU_ID , PB_1_FRU_ID , PB_2_FRU_ID , PB_3_FRU_ID , FB_1_FRU_ID , FB_2_FRU_ID , FB_3_FRU_ID , FB_4_FRU_ID , FB_5_FRU_ID , FB_6_FRU_ID , FB_7_FRU_ID , FB_8_FRU_ID , FB_9_FRU_ID , FB_10_FRU_ID , FB_11_FRU_ID , FB_12_FRU_ID , FB_13_FRU_ID , FB_14_FRU_ID , FIO_FRU_ID , MAX_FRU_ID , FIO_FRU_ID = 0x0D , CB_FRU_ID = 0x10 , ACCL_1_FRU_ID = 0x12 , ACCL_2_FRU_ID , ACCL_3_FRU_ID , ACCL_4_FRU_ID , ACCL_5_FRU_ID , ACCL_6_FRU_ID , ACCL_7_FRU_ID , ACCL_8_FRU_ID , ACCL_9_FRU_ID , ACCL_10_FRU_ID , ACCL_11_FRU_ID , ACCL_12_FRU_ID , ACCL_1_CH1_FREYA_FRU_ID = 0x1E , ACCL_1_CH2_FREYA_FRU_ID , ACCL_2_CH1_FREYA_FRU_ID , ACCL_2_CH2_FREYA_FRU_ID , ACCL_3_CH1_FREYA_FRU_ID , ACCL_3_CH2_FREYA_FRU_ID , ACCL_4_CH1_FREYA_FRU_ID , ACCL_4_CH2_FREYA_FRU_ID , ACCL_5_CH1_FREYA_FRU_ID , ACCL_5_CH2_FREYA_FRU_ID , ACCL_6_CH1_FREYA_FRU_ID , ACCL_6_CH2_FREYA_FRU_ID , ACCL_7_CH1_FREYA_FRU_ID , ACCL_7_CH2_FREYA_FRU_ID , ACCL_8_CH1_FREYA_FRU_ID , ACCL_8_CH2_FREYA_FRU_ID , ACCL_9_CH1_FREYA_FRU_ID , ACCL_9_CH2_FREYA_FRU_ID , ACCL_10_CH1_FREYA_FRU_ID , ACCL_10_CH2_FREYA_FRU_ID , ACCL_11_CH1_FREYA_FRU_ID , ACCL_11_CH2_FREYA_FRU_ID , ACCL_12_CH1_FREYA_FRU_ID , ACCL_12_CH2_FREYA_FRU_ID , MAX_FRU_ID , MC_FRU_ID = 0x11 , CXL_FRU_ID1 = 0x1E , CXL_FRU_ID2 , CXL_FRU_ID3 , CXL_FRU_ID4 , MC_E1S_4_FRU_ID , MC_E1S_3_FRU_ID , MC_E1S_2_FRU_ID , MC_E1S_1_FRU_ID , CXL_FRU_ID5 , CXL_FRU_ID6 , CXL_FRU_ID7 , CXL_FRU_ID8 , SYS_DEBUG_ID , MAX_FRU_ID , LOG_EEPROM_ID = 0x00 , MAX_FRU_ID , VF_FRU_ID , MAX_FRU_ID , NF_FRU_ID = 0 , MAX_FRU_ID , RF_FRU_ID , MAX_FRU_ID }

enum	{ CXL_FRU_MUX0_CHANNEL0 , CXL_FRU_MUX0_CHANNEL1 , CXL_FRU_MUX0_CHANNEL2 , CXL_FRU_MUX0_CHANNEL3 , CXL_FRU_MUX0_CHANNEL4 , CXL_FRU_MUX0_CHANNEL5 , CXL_FRU_MUX0_CHANNEL6 , CXL_FRU_MUX0_CHANNEL7 }

Functions
uint8_t	pal_cxl_map_mux0_channel (uint8_t cxl_fru_id)

Macro Definition Documentation

◆ BIC_FRU_DEV_ID

#define BIC_FRU_DEV_ID MC_FRU_ID

◆ CXL_FRU_ADDR

#define CXL_FRU_ADDR (0xA8 >> 1)

◆ CXL_FRU_MUX0_ADDR

#define CXL_FRU_MUX0_ADDR (0xE0 >> 1)

◆ CXL_FRU_MUX1_ADDR

#define CXL_FRU_MUX1_ADDR (0xE2 >> 1)

◆ CXL_FRU_MUX1_CHANNEL

#define CXL_FRU_MUX1_CHANNEL 2

◆ CXL_FRU_PORT

#define CXL_FRU_PORT I2C_BUS2

◆ FRU_CFG_NUM

#define FRU_CFG_NUM 10

◆ MC_FRU_ADDR

#define MC_FRU_ADDR (0xA0 >> 1)

◆ MC_FRU_PORT

#define MC_FRU_PORT I2C_BUS1

Enumeration Type Documentation

◆ anonymous enum

anonymous enum

Enumerator
CXL_FRU_MUX0_CHANNEL0
CXL_FRU_MUX0_CHANNEL1
CXL_FRU_MUX0_CHANNEL2
CXL_FRU_MUX0_CHANNEL3
CXL_FRU_MUX0_CHANNEL4
CXL_FRU_MUX0_CHANNEL5
CXL_FRU_MUX0_CHANNEL6
CXL_FRU_MUX0_CHANNEL7

◆ FRU_ID

enum FRU_ID

Enumerator
MB_FRU_ID
BB_FRU_ID
BPB_FRU_ID
PDB_FRU_ID
SB_FRU_ID
PB_1_FRU_ID
PB_2_FRU_ID
PB_3_FRU_ID
FB_1_FRU_ID
FB_2_FRU_ID
FB_3_FRU_ID
FB_4_FRU_ID
FB_5_FRU_ID
FB_6_FRU_ID
FB_7_FRU_ID
FB_8_FRU_ID
FB_9_FRU_ID
FB_10_FRU_ID
FB_11_FRU_ID
FB_12_FRU_ID
FB_13_FRU_ID
FB_14_FRU_ID
FIO_FRU_ID
MAX_FRU_ID
FIO_FRU_ID
CB_FRU_ID
ACCL_1_FRU_ID
ACCL_2_FRU_ID
ACCL_3_FRU_ID
ACCL_4_FRU_ID
ACCL_5_FRU_ID
ACCL_6_FRU_ID
ACCL_7_FRU_ID
ACCL_8_FRU_ID
ACCL_9_FRU_ID
ACCL_10_FRU_ID
ACCL_11_FRU_ID
ACCL_12_FRU_ID
ACCL_1_CH1_FREYA_FRU_ID
ACCL_1_CH2_FREYA_FRU_ID
ACCL_2_CH1_FREYA_FRU_ID
ACCL_2_CH2_FREYA_FRU_ID
ACCL_3_CH1_FREYA_FRU_ID
ACCL_3_CH2_FREYA_FRU_ID
ACCL_4_CH1_FREYA_FRU_ID
ACCL_4_CH2_FREYA_FRU_ID
ACCL_5_CH1_FREYA_FRU_ID
ACCL_5_CH2_FREYA_FRU_ID
ACCL_6_CH1_FREYA_FRU_ID
ACCL_6_CH2_FREYA_FRU_ID
ACCL_7_CH1_FREYA_FRU_ID
ACCL_7_CH2_FREYA_FRU_ID
ACCL_8_CH1_FREYA_FRU_ID
ACCL_8_CH2_FREYA_FRU_ID
ACCL_9_CH1_FREYA_FRU_ID
ACCL_9_CH2_FREYA_FRU_ID
ACCL_10_CH1_FREYA_FRU_ID
ACCL_10_CH2_FREYA_FRU_ID
ACCL_11_CH1_FREYA_FRU_ID
ACCL_11_CH2_FREYA_FRU_ID
ACCL_12_CH1_FREYA_FRU_ID
ACCL_12_CH2_FREYA_FRU_ID
MAX_FRU_ID
MC_FRU_ID
CXL_FRU_ID1
CXL_FRU_ID2
CXL_FRU_ID3
CXL_FRU_ID4
MC_E1S_4_FRU_ID
MC_E1S_3_FRU_ID
MC_E1S_2_FRU_ID
MC_E1S_1_FRU_ID
CXL_FRU_ID5
CXL_FRU_ID6
CXL_FRU_ID7
CXL_FRU_ID8
SYS_DEBUG_ID
MAX_FRU_ID
LOG_EEPROM_ID
MAX_FRU_ID
VF_FRU_ID
MAX_FRU_ID
NF_FRU_ID
MAX_FRU_ID
RF_FRU_ID
MAX_FRU_ID

Function Documentation

◆ pal_cxl_map_mux0_channel()

uint8_t pal_cxl_map_mux0_channel ( uint8_t cxl_fru_id )

Macros

Enumerations

Functions