#include <shell/shell.h>#include <stdlib.h>#include <string.h>#include <logging/log.h>#include "plat_i2c.h"#include "plat_cpld.h"#include "plat_class.h"#include "plat_ioexp.h"
Include dependency graph for shell_plat_power_capping_control.c:
Macros | |
| #define | ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) |
| #define | POWER_CAPPING_LV1_CPLD_OFFSET 0xA6 |
| #define | POWER_CAPPING_LV2_LV3_CPLD_OFFSET 0x25 |
| #define | VR_HOT_EVB_IOEXP_OUTPUT_OFFSET TCA6424A_OUTPUT_PORT_0 |
| #define | MEDHA0_PWR_CAP_LV1_BIT 1 |
| #define | MEDHA1_PWR_CAP_LV1_BIT 0 |
| #define | MEDHA0_PWR_CAP_LV2_BIT 7 |
| #define | MEDHA1_PWR_CAP_LV2_BIT 6 |
| #define | MEDHA0_PWR_CAP_LV3_BIT 5 |
| #define | MEDHA1_PWR_CAP_LV3_BIT 4 |
| #define | VR_HOT_RAINBOW_BIT 0 |
| #define | VR_HOT_EVB_BIT HAMSA_MFIO19 |
| #define | POWER_CAPPING_SET_BIT(orig, bit) ((uint8_t)((orig) | (1u << (bit)))) |
| #define | POWER_CAPPING_CLR_BIT(orig, bit) ((uint8_t)((orig) & ~(1u << (bit)))) |
Functions | |
| LOG_MODULE_REGISTER (power_capping_control, LOG_LEVEL_DBG) | |
| SHELL_DYNAMIC_CMD_CREATE (set_dynamic, power_capping_dynamic_get_name) | |
| SHELL_STATIC_SUBCMD_SET_CREATE (get_subcmds, SHELL_CMD(all, NULL, "power_capping_control get all", NULL), SHELL_SUBCMD_SET_END) | |
| SHELL_STATIC_SUBCMD_SET_CREATE (power_capping_subcmds, SHELL_CMD(get, &get_subcmds, "power_capping_control get all", cmd_power_capping_get), SHELL_CMD(set, &set_dynamic, "power_capping_control set <NAME> <0|1>", cmd_power_capping_set), SHELL_SUBCMD_SET_END) | |
| SHELL_CMD_REGISTER (power_capping_control, &power_capping_subcmds, "Power capping control via CPLD", NULL) | |
Macro Definition Documentation
◆ ARRAY_SIZE
| #define ARRAY_SIZE | ( | x | ) | (sizeof(x) / sizeof((x)[0])) |
◆ MEDHA0_PWR_CAP_LV1_BIT
| #define MEDHA0_PWR_CAP_LV1_BIT 1 |
◆ MEDHA0_PWR_CAP_LV2_BIT
| #define MEDHA0_PWR_CAP_LV2_BIT 7 |
◆ MEDHA0_PWR_CAP_LV3_BIT
| #define MEDHA0_PWR_CAP_LV3_BIT 5 |
◆ MEDHA1_PWR_CAP_LV1_BIT
| #define MEDHA1_PWR_CAP_LV1_BIT 0 |
◆ MEDHA1_PWR_CAP_LV2_BIT
| #define MEDHA1_PWR_CAP_LV2_BIT 6 |
◆ MEDHA1_PWR_CAP_LV3_BIT
| #define MEDHA1_PWR_CAP_LV3_BIT 4 |
◆ POWER_CAPPING_CLR_BIT
| #define POWER_CAPPING_CLR_BIT | ( | orig, | |
| bit | |||
| ) | ((uint8_t)((orig) & ~(1u << (bit)))) |
◆ POWER_CAPPING_LV1_CPLD_OFFSET
| #define POWER_CAPPING_LV1_CPLD_OFFSET 0xA6 |
◆ POWER_CAPPING_LV2_LV3_CPLD_OFFSET
| #define POWER_CAPPING_LV2_LV3_CPLD_OFFSET 0x25 |
◆ POWER_CAPPING_SET_BIT
| #define POWER_CAPPING_SET_BIT | ( | orig, | |
| bit | |||
| ) | ((uint8_t)((orig) | (1u << (bit)))) |
◆ VR_HOT_EVB_BIT
| #define VR_HOT_EVB_BIT HAMSA_MFIO19 |
◆ VR_HOT_EVB_IOEXP_OUTPUT_OFFSET
| #define VR_HOT_EVB_IOEXP_OUTPUT_OFFSET TCA6424A_OUTPUT_PORT_0 |
◆ VR_HOT_RAINBOW_BIT
| #define VR_HOT_RAINBOW_BIT 0 |
Function Documentation
◆ LOG_MODULE_REGISTER()
| LOG_MODULE_REGISTER | ( | power_capping_control | , |
| LOG_LEVEL_DBG | |||
| ) |
◆ SHELL_CMD_REGISTER()
| SHELL_CMD_REGISTER | ( | power_capping_control | , |
| & | power_capping_subcmds, | ||
| "Power capping control via CPLD" | , | ||
| NULL | |||
| ) |
◆ SHELL_DYNAMIC_CMD_CREATE()
| SHELL_DYNAMIC_CMD_CREATE | ( | set_dynamic | , |
| power_capping_dynamic_get_name | |||
| ) |
◆ SHELL_STATIC_SUBCMD_SET_CREATE() [1/2]
| SHELL_STATIC_SUBCMD_SET_CREATE | ( | get_subcmds | , |
| SHELL_CMD(all, NULL, "power_capping_control get all", NULL) | , | ||
| SHELL_SUBCMD_SET_END | |||
| ) |
◆ SHELL_STATIC_SUBCMD_SET_CREATE() [2/2]
| SHELL_STATIC_SUBCMD_SET_CREATE | ( | power_capping_subcmds | , |
| SHELL_CMD(get, &get_subcmds, "power_capping_control get all", cmd_power_capping_get) | , | ||
| SHELL_CMD(set, &set_dynamic, "power_capping_control set <NAME> <0|1>", cmd_power_capping_set) | , | ||
| SHELL_SUBCMD_SET_END | |||
| ) |
