#include <stdint.h>
#include <zephyr.h>
#include "ipmi.h"
Go to the source code of this file.
|
| enum | GET_SET_M2_OPTION {
DEVICE_SET_POWER_OFF = 0x00
, DEVICE_SET_POWER_ON = 0x01
, DEVICE_GET_POWER_STATUS = 0x03
, DEVICE_SET_POWER_OFF = 0x00
,
DEVICE_SET_POWER_ON = 0x01
, DEVICE_GET_POWER_STATUS = 0x03
, DEVICE_SET_POWER_OFF = 0x00
, DEVICE_SET_POWER_ON = 0x01
,
DEVICE_GET_POWER_STATUS = 0x03
, DEVICE_SET_POWER_OFF = 0x00
, DEVICE_SET_POWER_ON = 0x01
, DEVICE_GET_POWER_STATUS = 0x03
} |
| |
| enum | event_state_t { DEASSERT = 0
, ASSERT
} |
| |
| enum | cpld_reg_info_idx {
CPLD_REG_INFO_IDX_0 = 0
, CPLD_REG_INFO_IDX_1
, CPLD_REG_INFO_IDX_MAX
, CPLD_REG_INFO_IDX_0 = 0
,
CPLD_REG_INFO_IDX_1
, CPLD_REG_INFO_IDX_2
, CPLD_REG_INFO_IDX_MAX
} |
| |
| enum | vr_source_id_t {
PVCCIN_CPU0 = 0
, PVCCFA_EHV_FIVRA_CPU0 = 1
, PVCCINFAON_CPU0 = 2
, PVCCFA_EHV_CPU0 = 3
,
PVCCD_HV_CPU = 4
, P1V05_PCH_STB = 5
, P1V8_STBY = 6
, P5V_STBY = 7
,
P3V3_STBY = 8
, VR_P12V_E1S_0 = 9
, VR_P3V3_E1S_0 = 10
} |
| |
◆ CPLD_BIT_E1S_0_12V_POWER_R_EN
| #define CPLD_BIT_E1S_0_12V_POWER_R_EN 5 |
◆ CPLD_BIT_E1S_0_3V3_POWER_R_EN
| #define CPLD_BIT_E1S_0_3V3_POWER_R_EN 6 |
◆ CPLD_OFFSET_10
| #define CPLD_OFFSET_10 0x10 |
◆ DETECT_SMI_DELAY_90S
| #define DETECT_SMI_DELAY_90S 90 |
◆ add_vr_sel_info
◆ cpld_reg_info
◆ vr_fault_info
◆ cpld_reg_info_idx
| Enumerator |
|---|
| CPLD_REG_INFO_IDX_0 | |
| CPLD_REG_INFO_IDX_1 | |
| CPLD_REG_INFO_IDX_MAX | |
| CPLD_REG_INFO_IDX_0 | |
| CPLD_REG_INFO_IDX_1 | |
| CPLD_REG_INFO_IDX_2 | |
| CPLD_REG_INFO_IDX_MAX | |
◆ event_state_t
| Enumerator |
|---|
| DEASSERT | |
| ASSERT | |
◆ GET_SET_M2_OPTION
| Enumerator |
|---|
| DEVICE_SET_POWER_OFF | |
| DEVICE_SET_POWER_ON | |
| DEVICE_GET_POWER_STATUS | |
| DEVICE_SET_POWER_OFF | |
| DEVICE_SET_POWER_ON | |
| DEVICE_GET_POWER_STATUS | |
| DEVICE_SET_POWER_OFF | |
| DEVICE_SET_POWER_ON | |
| DEVICE_GET_POWER_STATUS | |
| DEVICE_SET_POWER_OFF | |
| DEVICE_SET_POWER_ON | |
| DEVICE_GET_POWER_STATUS | |
◆ vr_source_id_t
| Enumerator |
|---|
| PVCCIN_CPU0 | |
| PVCCFA_EHV_FIVRA_CPU0 | |
| PVCCINFAON_CPU0 | |
| PVCCFA_EHV_CPU0 | |
| PVCCD_HV_CPU | |
| P1V05_PCH_STB | |
| P1V8_STBY | |
| P5V_STBY | |
| P3V3_STBY | |
| VR_P12V_E1S_0 | |
| VR_P3V3_E1S_0 | |
◆ get_set_1ou_m2_power()
| int get_set_1ou_m2_power |
( |
ipmi_msg * |
msg, |
|
|
uint8_t |
device_id, |
|
|
uint8_t |
option |
|
) |
| |
◆ init_vr_event_work()
| void init_vr_event_work |
( |
| ) |
|
◆ ISR_BMC_PRDY()
◆ ISR_CATERR()
◆ ISR_CPU_MEMHOT()
◆ ISR_CPU_VPP_INT()
◆ ISR_CPUVR_HOT()
◆ ISR_DBP_PRSNT()
◆ ISR_DC_ON()
◆ ISR_E1S_0_INA233_ALRT()
| void ISR_E1S_0_INA233_ALRT |
( |
| ) |
|
◆ ISR_FM_THROTTLE()
◆ ISR_HSC_OC()
◆ ISR_HSC_THROTTLE()
| void ISR_HSC_THROTTLE |
( |
| ) |
|
◆ ISR_MB_THROTTLE()
◆ ISR_NMI()
◆ ISR_PCH_PWRGD()
◆ ISR_PCH_THMALTRIP()
| void ISR_PCH_THMALTRIP |
( |
| ) |
|
◆ ISR_PLTRST()
◆ ISR_POST_COMPLETE()
| void ISR_POST_COMPLETE |
( |
| ) |
|
◆ ISR_PWRGD_CPU()
◆ ISR_RMCA()
◆ ISR_SLP3()
◆ ISR_SMB_SENSOR_LVC3_ALERT()
| void ISR_SMB_SENSOR_LVC3_ALERT |
( |
| ) |
|
◆ ISR_SMI()
◆ ISR_SOC_THMALTRIP()
| void ISR_SOC_THMALTRIP |
( |
| ) |
|
◆ ISR_SYS_THROTTLE()
| void ISR_SYS_THROTTLE |
( |
| ) |
|
◆ ISR_VR_PWR_FAULT()
| void ISR_VR_PWR_FAULT |
( |
| ) |
|
◆ send_gpio_interrupt()
| void send_gpio_interrupt |
( |
uint8_t |
gpio_num | ) |
|