OpenBIC
OpenSource Bridge-IC
ads112c.h
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1/*
2 * Copyright (c) Meta Platforms, Inc. and affiliates.
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17#ifndef ADS112C_H
18#define ADS112C_H
19
21 //Input multiplexer configuration(Bit 7:4)
22 ADS112C_REG0_INPUT_AIN0AIN1 = 0x00, //AINP = AIN0, AINN = AIN1(default)
23 ADS112C_REG0_INPUT_AIN0AIN2 = 0x10, //AINP = AIN0, AINN = AIN2
24 ADS112C_REG0_INPUT_AIN0AIN3 = 0x20, //AINP = AIN0, AINN = AIN3
25 ADS112C_REG0_INPUT_AIN1AIN0 = 0x30, //AINP = AIN1, AINN = AIN0
26 ADS112C_REG0_INPUT_AIN1AIN2 = 0x40, //AINP = AIN1, AINN = AIN2
27 ADS112C_REG0_INPUT_AIN1AIN3 = 0x50, //AINP = AIN1, AINN = AIN3
28 ADS112C_REG0_INPUT_AIN2AIN3 = 0x60, //AINP = AIN2, AINN = AIN3
29 ADS112C_REG0_INPUT_AIN3AIN2 = 0x70, //AINP = AIN3, AINN = AIN2
30 ADS112C_REG0_INPUT_AIN0AVSS = 0x80, //AINP = AIN0, AINN = AVSS
31 ADS112C_REG0_INPUT_AIN1AVSS = 0x90, //AINP = AIN1, AINN = AVSS
32 ADS112C_REG0_INPUT_AIN2AVSS = 0xA0, //AINP = AIN2, AINN = AVSS
33 ADS112C_REG0_INPUT_AIN3AVSS = 0xB0, //AINP = AIN3, AINN = AVSS
34 //Gain configuration(Bit 3:1)
35 ADS112C_REG0_GAIN1 = 0x00, //Gain = 1 (default)
43 //Disables and bypasses the internal low-noise PGA (Bit 0)
46};
47
49 //Data rate (Bit 5:7)
51 //Conversion mode. (Bit 3)
54 //Voltage reference selection. (Bit 2:1)
57 //Temperature sensor mode. (Bit 0)
60};
61
63 //IDAC current setting (Bit 2:0)
72};
73
75 //IDAC1 routing configuration (Bit 7:5)
84};
85
86// Command Byte to control device
87#define CMD_RESET 0x06 //000 011x(06h)
88#define CMD_START_SYNC 0x08 //000 100x(08h)
89#define CMD_POWERDOWN 0x02 //000 001x(08h)
90#define CMD_RDATA 0x10 //001 000x(10h)
91#define CMD_RREG 0x20 //010 000x(20h)
92#define CMD_WREG 0x40 //100 000x(40h)
93
94// Configuration Registers offset
95#define CFG_REG_OFFSET0 0x00
96#define CFG_REG_OFFSET1 0x04
97#define CFG_REG_OFFSET2 0x08
98#define CFG_REG_OFFSET3 0x0C
99
100#define ADS112C_REG2_DRDY_READY 0x80
101#define ENABLE_RESET_CFG_REG 1
102#define DISABLE_RESET_CFG_REG 0
103
104typedef struct _ads112c_init_arg {
105 uint8_t reg0_input;
106 uint8_t reg0_gain;
107 uint8_t reg0_pga;
108 uint8_t reg1_dr;
113 uint8_t reg2_idac;
116
121};
122
123#endif //ADS112C_H
struct _ads112c_init_arg ads112c_init_arg
ADS112C_READ_OUTPUT_OFFSET
Definition: ads112c.h:117
@ ADS112C_READ_OUTPUT_RAW
Definition: ads112c.h:118
@ ADS112C_READ_OUTPUT_TEMP
Definition: ads112c.h:120
@ ADS112C_READ_OUTPUT_VOLT
Definition: ads112c.h:119
ADS112C_REG2_CONFIG
Definition: ads112c.h:62
@ ADS112C_REG2_IDAC_250UA
Definition: ads112c.h:68
@ ADS112C_REG2_IDAC_50UA
Definition: ads112c.h:66
@ ADS112C_REG2_IDAC_1500UA
Definition: ads112c.h:71
@ ADS112C_REG2_IDAC_500UA
Definition: ads112c.h:69
@ ADS112C_REG2_IDAC_OFF
Definition: ads112c.h:64
@ ADS112C_REG2_IDAC_1000UA
Definition: ads112c.h:70
@ ADS112C_REG2_IDAC_100UA
Definition: ads112c.h:67
@ ADS112C_REG2_IDAC_10UA
Definition: ads112c.h:65
ADS112C_REG3_CONFIG
Definition: ads112c.h:74
@ ADS112C_REG3_IDAC1_DISABLED
Definition: ads112c.h:76
@ ADS112C_REG3_IDAC1_REFN
Definition: ads112c.h:82
@ ADS112C_REG3_IDAC1_RESERVED
Definition: ads112c.h:83
@ ADS112C_REG3_IDAC1_REFP
Definition: ads112c.h:81
@ ADS112C_REG3_IDAC1_AIN3
Definition: ads112c.h:80
@ ADS112C_REG3_IDAC1_AIN1
Definition: ads112c.h:78
@ ADS112C_REG3_IDAC1_AIN0
Definition: ads112c.h:77
@ ADS112C_REG3_IDAC1_AIN2
Definition: ads112c.h:79
ADS112C_REG0_CONFIG
Definition: ads112c.h:20
@ ADS112C_REG0_GAIN64
Definition: ads112c.h:41
@ ADS112C_REG0_INPUT_AIN3AIN2
Definition: ads112c.h:29
@ ADS112C_REG0_GAIN1
Definition: ads112c.h:35
@ ADS112C_REG0_INPUT_AIN1AVSS
Definition: ads112c.h:31
@ ADS112C_REG0_INPUT_AIN1AIN3
Definition: ads112c.h:27
@ ADS112C_REG0_GAIN2
Definition: ads112c.h:36
@ ADS112C_REG0_INPUT_AIN0AVSS
Definition: ads112c.h:30
@ ADS112C_REG0_PGA_DISABLE
Definition: ads112c.h:45
@ ADS112C_REG0_INPUT_AIN3AVSS
Definition: ads112c.h:33
@ ADS112C_REG0_GAIN8
Definition: ads112c.h:38
@ ADS112C_REG0_INPUT_AIN1AIN2
Definition: ads112c.h:26
@ ADS112C_REG0_INPUT_AIN0AIN1
Definition: ads112c.h:22
@ ADS112C_REG0_GAIN32
Definition: ads112c.h:40
@ ADS112C_REG0_INPUT_AIN0AIN2
Definition: ads112c.h:23
@ ADS112C_REG0_INPUT_AIN1AIN0
Definition: ads112c.h:25
@ ADS112C_REG0_INPUT_AIN2AVSS
Definition: ads112c.h:32
@ ADS112C_REG0_INPUT_AIN0AIN3
Definition: ads112c.h:24
@ ADS112C_REG0_PGA_ENABLE
Definition: ads112c.h:44
@ ADS112C_REG0_GAIN16
Definition: ads112c.h:39
@ ADS112C_REG0_GAIN4
Definition: ads112c.h:37
@ ADS112C_REG0_GAIN128
Definition: ads112c.h:42
@ ADS112C_REG0_INPUT_AIN2AIN3
Definition: ads112c.h:28
ADS112C_REG1_CONFIG
Definition: ads112c.h:48
@ ADS112C_REG1_CONTINUEMODE
Definition: ads112c.h:53
@ ADS112C_REG1_SINGLEMODE
Definition: ads112c.h:52
@ ADS112C_REG1_INTERNALV
Definition: ads112c.h:55
@ ADS112C_REG1_TEMPMODE_DISABLE
Definition: ads112c.h:58
@ ADS112C_REG1_TEMPMODE_ENABLE
Definition: ads112c.h:59
@ ADS112C_REG1_EXTERNALV
Definition: ads112c.h:56
@ ADS112C_REG1_DR_1000_SPS
Definition: ads112c.h:50
Definition: ads112c.h:104
uint8_t reg1_conversion
Definition: ads112c.h:109
uint8_t reg0_pga
Definition: ads112c.h:107
double vol_refer_val
Definition: ads112c.h:111
uint8_t reg1_dr
Definition: ads112c.h:108
uint8_t reg2_idac
Definition: ads112c.h:113
uint8_t reg1_temp_mode
Definition: ads112c.h:112
uint8_t reg0_input
Definition: ads112c.h:105
uint8_t reg0_gain
Definition: ads112c.h:106
uint8_t reg3_idac1_cfg
Definition: ads112c.h:114
uint8_t reg1_vol_refer
Definition: ads112c.h:110