22#include <sys/byteorder.h>
24#define READ_DDR_TEMP_REQ_LEN 0
25#define READ_DDR_TEMP_RESP_LEN 32
27#define VISTARA_SPD_DDR4_TOTAL_BYTES 512
28#define VISTARA_SPD_CHUNK_DEFAULT 64
29#define VISTARA_SPD_MODULE_SN_OFF 325
30#define VISTARA_SPD_MODULE_SN_LEN 4
31#define VISTARA_CCI_BUFFER_SIZE 256
33enum VISTARA_CCI_CMD_OEM_OPCODE {
34 CCI_OEM_OP_READ_DDR_TEMP = 0xC531,
35 CCI_OEM_OP_DIMM_SPD_READ = 0xC510,
38enum VISTARA_SENSOR_TYPE {
58struct vistara_dimm_spd_read_args {
64static inline size_t vistara_encode_dimm_spd_read(uint8_t dst[12],
65 const struct vistara_dimm_spd_read_args *a)
67 sys_put_le32(a->spd_id, &dst[0]);
68 sys_put_le32(a->offset, &dst[4]);
69 sys_put_le32(a->num_bytes, &dst[8]);
76bool vistara_cci_command(uint8_t cxl_eid,
mctp_cci_msg cci_msg, uint8_t *resp, uint8_t resp_len);
77bool vistara_read_ddr_temp(uint8_t cxl_eid, uint8_t *resp);
78int vistara_read_dimm_spd_chunk_eid(uint8_t cxl_eid, uint8_t dimm_idx, uint16_t
offset,
79 uint8_t
length, uint8_t *out);
80bool vistara_read_dimm_spd_ddr4(uint8_t cxl_eid, uint8_t dimm_idx,
81 uint8_t out512[VISTARA_SPD_DDR4_TOTAL_BYTES]);
uint8_t status
Definition: mctp_ctrl.h:1
uint32_t reserved
Definition: plat_ncsi.h:4
uint32_t offset
Definition: pldm_firmware_update.h:0
uint32_t length
Definition: pldm_firmware_update.h:1